mirror of
https://github.com/c64scene-ar/llvm-6502.git
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Match MachineFunction::UsedPhysRegs changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36452 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
505e5510a2
commit
6c087e5585
@ -156,19 +156,18 @@ void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) {
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// Now figure out which *callee saved* registers are modified by the current
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// function, thus needing to be saved and restored in the prolog/epilog.
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//
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const bool *PhysRegsUsed = Fn.getUsedPhysregs();
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const TargetRegisterClass* const *CSRegClasses =
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RegInfo->getCalleeSavedRegClasses();
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std::vector<CalleeSavedInfo> CSI;
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for (unsigned i = 0; CSRegs[i]; ++i) {
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unsigned Reg = CSRegs[i];
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if (PhysRegsUsed[Reg]) {
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if (Fn.isPhysRegUsed(Reg)) {
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// If the reg is modified, save it!
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CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i]));
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} else {
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for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
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*AliasSet; ++AliasSet) { // Check alias registers too.
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if (PhysRegsUsed[*AliasSet]) {
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if (Fn.isPhysRegUsed(*AliasSet)) {
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CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i]));
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break;
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}
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@ -61,7 +61,6 @@ namespace {
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const TargetMachine* tm_;
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const MRegisterInfo* mri_;
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LiveIntervals* li_;
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bool *PhysRegsUsed;
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/// handled_ - Intervals are added to the handled_ set in the order of their
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/// start value. This is uses for backtracking.
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@ -194,10 +193,6 @@ bool RA::runOnMachineFunction(MachineFunction &fn) {
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if (RelatedRegClasses.empty())
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ComputeRelatedRegClasses();
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PhysRegsUsed = new bool[mri_->getNumRegs()];
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std::fill(PhysRegsUsed, PhysRegsUsed+mri_->getNumRegs(), false);
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fn.setUsedPhysRegs(PhysRegsUsed);
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if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_));
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vrm_.reset(new VirtRegMap(*mf_));
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if (!spiller_.get()) spiller_.reset(createSpiller());
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@ -231,7 +226,7 @@ void RA::initIntervalSets()
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for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) {
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if (MRegisterInfo::isPhysicalRegister(i->second.reg)) {
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PhysRegsUsed[i->second.reg] = true;
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mf_->setPhysRegUsed(i->second.reg);
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fixed_.push_back(std::make_pair(&i->second, i->second.begin()));
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} else
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unhandled_.push(&i->second);
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@ -47,7 +47,6 @@ namespace {
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MachineFunction *MF;
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const MRegisterInfo *RegInfo;
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LiveVariables *LV;
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bool *PhysRegsEverUsed;
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// StackSlotForVirtReg - Maps virtual regs to the frame index where these
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// values are spilled.
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@ -511,7 +510,7 @@ MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
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RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
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++NumLoads; // Update statistics
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PhysRegsEverUsed[PhysReg] = true;
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MF->setPhysRegUsed(PhysReg);
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MI->getOperand(OpNum).setReg(PhysReg); // Assign the input register
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return MI;
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}
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@ -532,7 +531,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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for (MachineFunction::livein_iterator I = MF->livein_begin(),
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E = MF->livein_end(); I != E; ++I) {
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unsigned Reg = I->first;
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PhysRegsEverUsed[Reg] = true;
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MF->setPhysRegUsed(Reg);
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PhysRegsUsed[Reg] = 0; // It is free and reserved now
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PhysRegsUseOrder.push_back(Reg);
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for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
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@ -540,7 +539,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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if (PhysRegsUsed[*AliasSet] != -2) {
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PhysRegsUseOrder.push_back(*AliasSet);
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PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
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PhysRegsEverUsed[*AliasSet] = true;
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MF->setPhysRegUsed(*AliasSet);
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}
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}
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}
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@ -630,7 +629,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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unsigned Reg = MO.getReg();
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if (PhysRegsUsed[Reg] == -2) continue; // Something like ESP.
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PhysRegsEverUsed[Reg] = true;
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MF->setPhysRegUsed(Reg);
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spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in reg
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PhysRegsUsed[Reg] = 0; // It is free and reserved now
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PhysRegsUseOrder.push_back(Reg);
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@ -639,7 +638,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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if (PhysRegsUsed[*AliasSet] != -2) {
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PhysRegsUseOrder.push_back(*AliasSet);
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PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
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PhysRegsEverUsed[*AliasSet] = true;
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MF->setPhysRegUsed(*AliasSet);
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}
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}
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}
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@ -656,7 +655,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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PhysRegsUseOrder.push_back(Reg);
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PhysRegsUsed[Reg] = 0; // It is free and reserved now
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}
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PhysRegsEverUsed[Reg] = true;
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MF->setPhysRegUsed(Reg);
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for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
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*AliasSet; ++AliasSet) {
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@ -665,7 +664,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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PhysRegsUseOrder.push_back(*AliasSet);
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PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
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}
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PhysRegsEverUsed[*AliasSet] = true;
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MF->setPhysRegUsed(*AliasSet);
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}
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}
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}
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@ -693,7 +692,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// If DestVirtReg already has a value, use it.
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if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
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DestPhysReg = getReg(MBB, MI, DestVirtReg);
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PhysRegsEverUsed[DestPhysReg] = true;
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MF->setPhysRegUsed(DestPhysReg);
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markVirtRegModified(DestVirtReg);
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MI->getOperand(i).setReg(DestPhysReg); // Assign the output register
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}
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@ -779,10 +778,6 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) {
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RegInfo = TM->getRegisterInfo();
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LV = &getAnalysis<LiveVariables>();
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PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
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std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
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Fn.setUsedPhysRegs(PhysRegsEverUsed);
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PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
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// At various places we want to efficiently check to see whether a register
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@ -41,7 +41,6 @@ namespace {
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MachineFunction *MF;
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const TargetMachine *TM;
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const MRegisterInfo *RegInfo;
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bool *PhysRegsEverUsed;
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// StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
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// these values are spilled
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@ -126,7 +125,7 @@ unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
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unsigned PhysReg = *(RI+regIdx);
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if (!RegsUsed[PhysReg]) {
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PhysRegsEverUsed[PhysReg] = true;
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MF->setPhysRegUsed(PhysReg);
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return PhysReg;
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}
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}
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@ -178,7 +177,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
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if (Desc.ImplicitDefs) {
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for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
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RegsUsed[*Regs] = true;
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PhysRegsEverUsed[*Regs] = true;
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MF->setPhysRegUsed(*Regs);
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}
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}
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@ -236,10 +235,6 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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TM = &MF->getTarget();
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RegInfo = TM->getRegisterInfo();
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PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
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std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
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Fn.setUsedPhysRegs(PhysRegsEverUsed);
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// Loop over all of the basic blocks, eliminating virtual register references
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB)
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@ -174,7 +174,6 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
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DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
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const TargetMachine &TM = MF.getTarget();
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const MRegisterInfo &MRI = *TM.getRegisterInfo();
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bool *PhysRegsUsed = MF.getUsedPhysregs();
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// LoadedRegs - Keep track of which vregs are loaded, so that we only load
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// each vreg once (in the case where a spilled vreg is used by multiple
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@ -214,10 +213,10 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
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++NumStores;
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}
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}
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PhysRegsUsed[PhysReg] = true;
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MF.setPhysRegUsed(PhysReg);
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MI.getOperand(i).setReg(PhysReg);
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} else {
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PhysRegsUsed[MO.getReg()] = true;
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MF.setPhysRegUsed(MO.getReg());
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}
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}
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@ -648,8 +647,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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// same stack slot, the original store is deleted.
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std::map<int, MachineInstr*> MaybeDeadStores;
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bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs();
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MachineFunction &MF = *MBB.getParent();
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for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
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MII != E; ) {
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MachineInstr &MI = *MII;
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@ -688,7 +686,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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const unsigned *ImpDef = TID->ImplicitDefs;
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if (ImpDef) {
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for ( ; *ImpDef; ++ImpDef) {
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PhysRegsUsed[*ImpDef] = true;
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MF.setPhysRegUsed(*ImpDef);
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ReusedOperands.markClobbered(*ImpDef);
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Spills.ClobberPhysReg(*ImpDef);
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}
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@ -703,7 +701,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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if (MRegisterInfo::isPhysicalRegister(MO.getReg())) {
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// Ignore physregs for spilling, but remember that it is used by this
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// function.
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PhysRegsUsed[MO.getReg()] = true;
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MF.setPhysRegUsed(MO.getReg());
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ReusedOperands.markClobbered(MO.getReg());
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continue;
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}
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@ -715,7 +713,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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if (!VRM.hasStackSlot(VirtReg)) {
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// This virtual register was assigned a physreg!
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unsigned Phys = VRM.getPhys(VirtReg);
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PhysRegsUsed[Phys] = true;
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MF.setPhysRegUsed(Phys);
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if (MO.isDef())
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ReusedOperands.markClobbered(Phys);
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MI.getOperand(i).setReg(Phys);
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@ -842,10 +840,8 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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continue;
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}
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const TargetRegisterClass* RC =
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MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
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PhysRegsUsed[DesignatedReg] = true;
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const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg);
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MF.setPhysRegUsed(DesignatedReg);
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ReusedOperands.markClobbered(DesignatedReg);
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MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC);
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@ -883,8 +879,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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// Otherwise, reload it and remember that we have it.
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PhysReg = VRM.getPhys(VirtReg);
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assert(PhysReg && "Must map virtreg to physreg!");
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const TargetRegisterClass* RC =
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MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
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const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg);
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// Note that, if we reused a register for a previous operand, the
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// register we want to reload into might not actually be
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@ -894,7 +889,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
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Spills, MaybeDeadStores);
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PhysRegsUsed[PhysReg] = true;
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MF.setPhysRegUsed(PhysReg);
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ReusedOperands.markClobbered(PhysReg);
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if (doReMat) {
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MRI->reMaterialize(MBB, &MI, PhysReg, VRM.getReMaterializedMI(VirtReg));
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@ -947,7 +942,6 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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MachineInstr *SSMI = NULL;
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if (unsigned InReg = Spills.getSpillSlotPhysReg(SS, SSMI)) {
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DOUT << "Promoted Load To Copy: " << MI;
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MachineFunction &MF = *MBB.getParent();
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if (DestReg != InReg) {
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MRI->copyRegToReg(MBB, &MI, DestReg, InReg,
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MF.getSSARegMap()->getRegClass(VirtReg));
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@ -1081,8 +1075,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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// The only vregs left are stack slot definitions.
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int StackSlot = VRM.getStackSlot(VirtReg);
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const TargetRegisterClass *RC =
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MBB.getParent()->getSSARegMap()->getRegClass(VirtReg);
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const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(VirtReg);
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// If this def is part of a two-address operand, make sure to execute
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// the store from the correct physical register.
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@ -1100,7 +1093,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
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}
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}
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PhysRegsUsed[PhysReg] = true;
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MF.setPhysRegUsed(PhysReg);
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ReusedOperands.markClobbered(PhysReg);
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MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
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DOUT << "Store:\t" << *next(MII);
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@ -350,9 +350,6 @@ BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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// Some targets reserve R9.
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if (STI.isR9Reserved())
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Reserved.set(ARM::R9);
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// At PEI time, if LR is used, it will be spilled upon entry.
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if (MF.getUsedPhysregs() && !MF.isPhysRegUsed((unsigned)ARM::LR))
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Reserved.set(ARM::LR);
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return Reserved;
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}
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@ -1094,7 +1091,7 @@ ARMRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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// If LR is not spilled, but at least one of R4, R5, R6, and R7 is spilled.
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// Spill LR as well so we can fold BX_RET to the registers restore (LDM).
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if (!LRSpilled && CS1Spilled) {
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MF.changePhyRegUsed(ARM::LR, true);
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MF.setPhysRegUsed(ARM::LR);
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AFI->setCSRegisterIsSpilled(ARM::LR);
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NumGPRSpills++;
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UnspilledCS1GPRs.erase(std::find(UnspilledCS1GPRs.begin(),
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@ -1106,7 +1103,7 @@ ARMRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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// Darwin ABI requires FP to point to the stack slot that contains the
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// previous FP.
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if (STI.isTargetDarwin() || hasFP(MF)) {
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MF.changePhyRegUsed(FramePtr, true);
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MF.setPhysRegUsed(FramePtr);
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NumGPRSpills++;
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}
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@ -1117,13 +1114,13 @@ ARMRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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if (TargetAlign == 8 && (NumGPRSpills & 1)) {
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if (CS1Spilled && !UnspilledCS1GPRs.empty()) {
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unsigned Reg = UnspilledCS1GPRs.front();
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MF.changePhyRegUsed(Reg, true);
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MF.setPhysRegUsed(Reg);
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AFI->setCSRegisterIsSpilled(Reg);
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if (!isReservedReg(MF, Reg))
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ExtraCSSpill = true;
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} else if (!UnspilledCS2GPRs.empty()) {
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unsigned Reg = UnspilledCS2GPRs.front();
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MF.changePhyRegUsed(Reg, true);
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MF.setPhysRegUsed(Reg);
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AFI->setCSRegisterIsSpilled(Reg);
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if (!isReservedReg(MF, Reg))
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ExtraCSSpill = true;
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@ -1178,7 +1175,7 @@ ARMRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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}
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if (Extras.size() && NumExtras == 0) {
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for (unsigned i = 0, e = Extras.size(); i != e; ++i) {
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MF.changePhyRegUsed(Extras[i], true);
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MF.setPhysRegUsed(Extras[i]);
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AFI->setCSRegisterIsSpilled(Extras[i]);
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}
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} else {
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@ -1192,7 +1189,7 @@ ARMRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
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}
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if (ForceLRSpill) {
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MF.changePhyRegUsed(ARM::LR, true);
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MF.setPhysRegUsed(ARM::LR);
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AFI->setCSRegisterIsSpilled(ARM::LR);
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AFI->setLRIsSpilledForFarJump(true);
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}
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@ -739,16 +739,16 @@ static void RemoveVRSaveCode(MachineInstr *MI) {
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// HandleVRSaveUpdate - MI is the UPDATE_VRSAVE instruction introduced by the
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// instruction selector. Based on the vector registers that have been used,
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// transform this into the appropriate ORI instruction.
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static void HandleVRSaveUpdate(MachineInstr *MI, const bool *UsedRegs,
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const TargetInstrInfo &TII) {
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static void HandleVRSaveUpdate(MachineInstr *MI, const TargetInstrInfo &TII) {
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MachineFunction *MF = MI->getParent()->getParent();
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unsigned UsedRegMask = 0;
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for (unsigned i = 0; i != 32; ++i)
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if (UsedRegs[VRRegNo[i]])
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if (MF->isPhysRegUsed(VRRegNo[i]))
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UsedRegMask |= 1 << (31-i);
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// Live in and live out values already must be in the mask, so don't bother
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// marking them.
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MachineFunction *MF = MI->getParent()->getParent();
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for (MachineFunction::livein_iterator I =
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MF->livein_begin(), E = MF->livein_end(); I != E; ++I) {
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unsigned RegNo = PPCRegisterInfo::getRegisterNumbering(I->first);
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@ -846,8 +846,7 @@ void PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
|
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PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
|
||||
unsigned LR = getRARegister();
|
||||
FI->setUsesLR(MF.isPhysRegUsed(LR));
|
||||
MF.changePhyRegUsed(LR, false);
|
||||
|
||||
MF.setPhysRegUnused(LR);
|
||||
|
||||
// Save R31 if necessary
|
||||
int FPSI = FI->getFramePointerSaveIndex();
|
||||
@ -883,7 +882,7 @@ void PPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
|
||||
// process it.
|
||||
for (unsigned i = 0; MBBI != MBB.end(); ++i, ++MBBI) {
|
||||
if (MBBI->getOpcode() == PPC::UPDATE_VRSAVE) {
|
||||
HandleVRSaveUpdate(MBBI, MF.getUsedPhysregs(), TII);
|
||||
HandleVRSaveUpdate(MBBI, TII);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -161,12 +161,11 @@ FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); }
|
||||
bool FPS::runOnMachineFunction(MachineFunction &MF) {
|
||||
// We only need to run this pass if there are any FP registers used in this
|
||||
// function. If it is all integer, there is nothing for us to do!
|
||||
const bool *PhysRegsUsed = MF.getUsedPhysregs();
|
||||
bool FPIsUsed = false;
|
||||
|
||||
assert(X86::FP6 == X86::FP0+6 && "Register enums aren't sorted right!");
|
||||
for (unsigned i = 0; i <= 6; ++i)
|
||||
if (PhysRegsUsed[X86::FP0+i]) {
|
||||
if (MF.isPhysRegUsed(X86::FP0+i)) {
|
||||
FPIsUsed = true;
|
||||
break;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user