Thread DataLayout through the callers and into mem2reg. This will be

useful in a subsequent patch, but causes an unfortunate amount of noise,
so I pulled it out into a separate patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187322 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chandler Carruth
2013-07-28 06:43:11 +00:00
parent f5b9110ce1
commit 6c3a95dab5
5 changed files with 23 additions and 14 deletions

View File

@@ -20,6 +20,7 @@
namespace llvm {
class AllocaInst;
class DataLayout;
class DominatorTree;
class AliasSetTracker;
@@ -29,7 +30,7 @@ class AliasSetTracker;
/// (transitively) using this alloca. This also enforces that there is only
/// ever one layer of bitcasts or GEPs between the alloca and the lifetime
/// markers.
bool isAllocaPromotable(const AllocaInst *AI);
bool isAllocaPromotable(const AllocaInst *AI, const DataLayout *DL);
/// \brief Promote the specified list of alloca instructions into scalar
/// registers, inserting PHI nodes as appropriate.
@@ -41,7 +42,7 @@ bool isAllocaPromotable(const AllocaInst *AI);
/// If AST is specified, the specified tracker is updated to reflect changes
/// made to the IR.
void PromoteMemToReg(ArrayRef<AllocaInst *> Allocas, DominatorTree &DT,
AliasSetTracker *AST = 0);
const DataLayout *DL, AliasSetTracker *AST = 0);
} // End llvm namespace