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Restrict machine cse to really trivial coalescing. Leave the heavy lifting to a real coalescer.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98007 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2010-03-08 23:28:08 +00:00
parent 57578766aa
commit 6c3b8ac6c9
1 changed files with 3 additions and 0 deletions
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3
lib/CodeGen/MachineCSE.cpp
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@ -91,7 +91,10 @@ bool MachineCSE::PerformTrivialCoalescing(MachineInstr *MI,
unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
if (TII->isMoveInstr(*DefMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) &&
TargetRegisterInfo::isVirtualRegister(SrcReg) &&
MRI->getRegClass(SrcReg) == MRI->getRegClass(Reg) &&
!SrcSubIdx && !DstSubIdx) {
DEBUG(dbgs() << "Coalescing: " << *DefMI);
DEBUG(dbgs() << "*** to: " << *MI);
MO.setReg(SrcReg);
DefMI->eraseFromParent();
++NumCoalesces;