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infer results of a pattern from implicit defs. This allows you to do something
like this: def : Pat<(add ...), (FOOINST)>; When fooinst only has a single implicit def (e.g. to R1). This will be handled as if written as (set R1, (FOOINST ...)) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98897 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1136,34 +1136,47 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) {
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if (getOperator()->isSubClassOf("Instruction")) {
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const DAGInstruction &Inst = CDP.getInstruction(getOperator());
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bool MadeChange = false;
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unsigned NumResults = Inst.getNumResults();
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assert(NumResults <= 1 &&
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"Only supports zero or one result instrs!");
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CodeGenInstruction &InstInfo =
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CDP.getTargetInfo().getInstruction(getOperator()->getName());
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EEVT::TypeSet ResultType;
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// Apply the result type to the node
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if (InstInfo.NumDefs == 0) { // # of elements in (outs) list
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MadeChange = UpdateNodeType(MVT::isVoid, TP);
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} else {
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if (InstInfo.NumDefs != 0) { // # of elements in (outs) list
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Record *ResultNode = Inst.getResult(0);
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if (ResultNode->isSubClassOf("PointerLikeRegClass")) {
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MadeChange = UpdateNodeType(MVT::iPTR, TP);
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ResultType = EEVT::TypeSet(MVT::iPTR, TP);
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} else if (ResultNode->getName() == "unknown") {
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// Nothing to do.
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} else {
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assert(ResultNode->isSubClassOf("RegisterClass") &&
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"Operands should be register classes!");
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const CodeGenRegisterClass &RC =
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CDP.getTargetInfo().getRegisterClass(ResultNode);
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MadeChange = UpdateNodeType(RC.getValueTypes(), TP);
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ResultType = RC.getValueTypes();
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}
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} else if (!InstInfo.ImplicitDefs.empty()) {
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// If the instruction has implicit defs, the first one defines the result
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// type.
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assert(InstInfo.ImplicitDefs[0]->isSubClassOf("Register"));
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Record *FirstImplicitDef = InstInfo.ImplicitDefs[0];
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const std::vector<MVT::SimpleValueType> &RegVTs =
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CDP.getTargetInfo().getRegisterVTs(FirstImplicitDef);
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if (!RegVTs.empty())
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ResultType = EEVT::TypeSet(RegVTs);
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} else {
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// Otherwise, the instruction produces no value result.
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// FIXME: Model "no result" different than "one result that is void"
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ResultType = EEVT::TypeSet(MVT::isVoid, TP);
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}
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bool MadeChange = UpdateNodeType(ResultType, TP);
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// If this is an INSERT_SUBREG, constrain the source and destination VTs to
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// be the same.
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if (getOperator()->getName() == "INSERT_SUBREG") {
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@ -2451,14 +2464,19 @@ void CodeGenDAGPatterns::ParsePatterns() {
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InferredAllResultTypes =
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Result->InferAllTypes(&Pattern->getNamedNodesMap());
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IterateInference = false;
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// Apply the type of the result to the source pattern. This helps us
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// resolve cases where the input type is known to be a pointer type (which
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// is considered resolved), but the result knows it needs to be 32- or
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// 64-bits. Infer the other way for good measure.
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IterateInference = Pattern->getTree(0)->
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UpdateNodeType(Result->getTree(0)->getExtType(), *Result);
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IterateInference |= Result->getTree(0)->
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UpdateNodeType(Pattern->getTree(0)->getExtType(), *Result);
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if (!Result->getTree(0)->getExtType().isVoid() &&
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!Pattern->getTree(0)->getExtType().isVoid()) {
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IterateInference = Pattern->getTree(0)->
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UpdateNodeType(Result->getTree(0)->getExtType(), *Result);
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IterateInference |= Result->getTree(0)->
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UpdateNodeType(Pattern->getTree(0)->getExtType(), *Result);
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}
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// If our iteration has converged and the input pattern's types are fully
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// resolved but the result pattern is not fully resolved, we may have a
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@ -2473,7 +2491,6 @@ void CodeGenDAGPatterns::ParsePatterns() {
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!InferredAllResultTypes)
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IterateInference = ForceArbitraryInstResultType(Result->getTree(0),
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*Result);
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} while (IterateInference);
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// Verify that we inferred enough types that we can do something with the
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@ -88,6 +88,10 @@ namespace EEVT {
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return TypeVec;
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}
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bool isVoid() const {
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return TypeVec.size() == 1 && TypeVec[0] == MVT::isVoid;
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}
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/// hasIntegerTypes - Return true if this TypeSet contains any integer value
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/// types.
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bool hasIntegerTypes() const;
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