Simplify the logic described in the comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182534 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier 2013-05-22 23:23:14 +00:00
parent 3d33184d9d
commit 6cd0d18f5e

View File

@ -510,9 +510,7 @@ public:
// super-registers. All registers aliasing Unit can be visited like this:
//
// for (MCRegUnitRootIterator RI(Unit, MCRI); RI.isValid(); ++RI) {
// unsigned Root = *RI;
// visit(Root);
// for (MCSuperRegIterator SI(Root, MCRI); SI.isValid(); ++SI)
// for (MCSuperRegIterator SI(Root, MCRI, true); SI.isValid(); ++SI)
// visit(*SI);
// }