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Transform (x&C)>V into (x&C)!=0 where possible
When the least bit of C is greater than V, (x&C) must be greater than V if it is not zero, so the comparison can be simplified. Although this was suggested in Target/X86/README.txt, it benefits any architecture with a directly testable form of AND. Patch by Kevin Schoedel git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170576 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1567,43 +1567,6 @@ The first one is done for all AMDs, Core2, and "Generic"
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The second one is done for: Atom, Pentium Pro, all AMDs, Pentium 4, Nocona,
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Core 2, and "Generic"
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//===---------------------------------------------------------------------===//
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Testcase:
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int a(int x) { return (x & 127) > 31; }
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Current output:
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movl 4(%esp), %eax
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andl $127, %eax
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cmpl $31, %eax
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seta %al
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movzbl %al, %eax
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ret
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Ideal output:
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xorl %eax, %eax
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testl $96, 4(%esp)
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setne %al
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ret
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This should definitely be done in instcombine, canonicalizing the range
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condition into a != condition. We get this IR:
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define i32 @a(i32 %x) nounwind readnone {
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entry:
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%0 = and i32 %x, 127 ; <i32> [#uses=1]
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%1 = icmp ugt i32 %0, 31 ; <i1> [#uses=1]
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%2 = zext i1 %1 to i32 ; <i32> [#uses=1]
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ret i32 %2
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}
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Instcombine prefers to strength reduce relational comparisons to equality
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comparisons when possible, this should be another case of that. This could
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be handled pretty easily in InstCombiner::visitICmpInstWithInstAndIntCst, but it
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looks like InstCombiner::visitICmpInstWithInstAndIntCst should really already
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be redesigned to use ComputeMaskedBits and friends.
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//===---------------------------------------------------------------------===//
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Testcase:
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int x(int a) { return (a&0xf0)>>4; }
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@ -1226,6 +1226,16 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
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ICI.setOperand(0, NewAnd);
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return &ICI;
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}
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// Replace ((X & AndCST) > RHSV) with ((X & AndCST) != 0), if any
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// bit set in (X & AndCST) will produce a result greater than RHSV.
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if (ICI.getPredicate() == ICmpInst::ICMP_UGT) {
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unsigned NTZ = AndCST->getValue().countTrailingZeros();
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if ((NTZ < AndCST->getBitWidth()) &&
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APInt::getOneBitSet(AndCST->getBitWidth(), NTZ).ugt(RHSV))
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return new ICmpInst(ICmpInst::ICMP_NE, LHSI,
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Constant::getNullValue(RHS->getType()));
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}
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}
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// Try to optimize things like "A[i]&42 == 0" to index computations.
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@ -677,3 +677,20 @@ define i1 @test66(i64 %A, i64 %B) {
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; CHECK-NEXT: ret i1 true
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ret i1 %cmp
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}
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; CHECK: @test67
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; CHECK: %and = and i32 %x, 96
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; CHECK: %cmp = icmp ne i32 %and, 0
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define i1 @test67(i32 %x) nounwind uwtable {
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%and = and i32 %x, 127
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%cmp = icmp sgt i32 %and, 31
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ret i1 %cmp
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}
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; CHECK: @test68
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; CHECK: %cmp = icmp ugt i32 %and, 30
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define i1 @test68(i32 %x) nounwind uwtable {
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%and = and i32 %x, 127
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%cmp = icmp sgt i32 %and, 30
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ret i1 %cmp
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}
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