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Do not hastily change the Opcode from 'r' to 'i' type if we're not actually

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SETTING the operand to be an immediate or have verified that one of the operands
is really a SignExtended or Unextended immediate value already, which warrants
an 'i' opcode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6662 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2003-06-07 02:34:43 +00:00
parent 1cb65f2d62
commit 6fe6905df2
2 changed files with 12 additions and 14 deletions
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13
lib/CodeGen/InstrSelection/InstrSelectionSupport.cpp
View File

@ -186,12 +186,6 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
immedValue);
if (opType == MachineOperand::MO_VirtualRegister)
constantThatMustBeLoaded = true;
else {
// The optype has changed from being a register to an immediate
// This means we need to change the opcode, e.g. ADDr -> ADDi
unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
minstr->setOpcode(newOpcode);
}
}
}
else
@ -209,7 +203,8 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
opCode, target, (immedPos == (int)op),
machineRegNum, immedValue);
if (opType == MachineOperand::MO_SignExtendedImmed) {
if (opType == MachineOperand::MO_SignExtendedImmed ||
opType == MachineOperand::MO_UnextendedImmed) {
// The optype is an immediate value
// This means we need to change the opcode, e.g. ADDr -> ADDi
unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
@ -233,6 +228,10 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
else if (opType == MachineOperand::MO_SignExtendedImmed ||
opType == MachineOperand::MO_UnextendedImmed) {
minstr->SetMachineOperandConst(op, opType, immedValue);
// The optype is or has become an immediate
// This means we need to change the opcode, e.g. ADDr -> ADDi
unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
minstr->setOpcode(newOpcode);
} else if (constantThatMustBeLoaded ||
(opValue && isa<GlobalValue>(opValue)))
{ // opValue is a constant that must be explicitly loaded into a reg

13
lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp
View File

@ -186,12 +186,6 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
immedValue);
if (opType == MachineOperand::MO_VirtualRegister)
constantThatMustBeLoaded = true;
else {
// The optype has changed from being a register to an immediate
// This means we need to change the opcode, e.g. ADDr -> ADDi
unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
minstr->setOpcode(newOpcode);
}
}
}
else
@ -209,7 +203,8 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
opCode, target, (immedPos == (int)op),
machineRegNum, immedValue);
if (opType == MachineOperand::MO_SignExtendedImmed) {
if (opType == MachineOperand::MO_SignExtendedImmed ||
opType == MachineOperand::MO_UnextendedImmed) {
// The optype is an immediate value
// This means we need to change the opcode, e.g. ADDr -> ADDi
unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
@ -233,6 +228,10 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
else if (opType == MachineOperand::MO_SignExtendedImmed ||
opType == MachineOperand::MO_UnextendedImmed) {
minstr->SetMachineOperandConst(op, opType, immedValue);
// The optype is or has become an immediate
// This means we need to change the opcode, e.g. ADDr -> ADDi
unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
minstr->setOpcode(newOpcode);
} else if (constantThatMustBeLoaded ||
(opValue && isa<GlobalValue>(opValue)))
{ // opValue is a constant that must be explicitly loaded into a reg