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Do not hastily change the Opcode from 'r' to 'i' type if we're not actually
SETTING the operand to be an immediate or have verified that one of the operands is really a SignExtended or Unextended immediate value already, which warrants an 'i' opcode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6662 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -186,12 +186,6 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
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immedValue);
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if (opType == MachineOperand::MO_VirtualRegister)
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constantThatMustBeLoaded = true;
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else {
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// The optype has changed from being a register to an immediate
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// This means we need to change the opcode, e.g. ADDr -> ADDi
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unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
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minstr->setOpcode(newOpcode);
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}
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}
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}
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else
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@ -209,7 +203,8 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
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opCode, target, (immedPos == (int)op),
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machineRegNum, immedValue);
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if (opType == MachineOperand::MO_SignExtendedImmed) {
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if (opType == MachineOperand::MO_SignExtendedImmed ||
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opType == MachineOperand::MO_UnextendedImmed) {
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// The optype is an immediate value
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// This means we need to change the opcode, e.g. ADDr -> ADDi
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unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
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@ -233,6 +228,10 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
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else if (opType == MachineOperand::MO_SignExtendedImmed ||
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opType == MachineOperand::MO_UnextendedImmed) {
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minstr->SetMachineOperandConst(op, opType, immedValue);
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// The optype is or has become an immediate
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// This means we need to change the opcode, e.g. ADDr -> ADDi
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unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
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minstr->setOpcode(newOpcode);
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} else if (constantThatMustBeLoaded ||
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(opValue && isa<GlobalValue>(opValue)))
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{ // opValue is a constant that must be explicitly loaded into a reg
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@ -186,12 +186,6 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
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immedValue);
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if (opType == MachineOperand::MO_VirtualRegister)
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constantThatMustBeLoaded = true;
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else {
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// The optype has changed from being a register to an immediate
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// This means we need to change the opcode, e.g. ADDr -> ADDi
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unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
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minstr->setOpcode(newOpcode);
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}
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}
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}
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else
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@ -209,7 +203,8 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
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opCode, target, (immedPos == (int)op),
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machineRegNum, immedValue);
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if (opType == MachineOperand::MO_SignExtendedImmed) {
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if (opType == MachineOperand::MO_SignExtendedImmed ||
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opType == MachineOperand::MO_UnextendedImmed) {
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// The optype is an immediate value
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// This means we need to change the opcode, e.g. ADDr -> ADDi
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unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
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@ -233,6 +228,10 @@ FixConstantOperandsForInstr(Instruction* vmInstr,
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else if (opType == MachineOperand::MO_SignExtendedImmed ||
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opType == MachineOperand::MO_UnextendedImmed) {
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minstr->SetMachineOperandConst(op, opType, immedValue);
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// The optype is or has become an immediate
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// This means we need to change the opcode, e.g. ADDr -> ADDi
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unsigned newOpcode = convertOpcodeFromRegToImm(opCode);
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minstr->setOpcode(newOpcode);
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} else if (constantThatMustBeLoaded ||
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(opValue && isa<GlobalValue>(opValue)))
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{ // opValue is a constant that must be explicitly loaded into a reg
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