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https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-12 17:32:19 +00:00
Remove DefInst from LiveVariables::VarInfo. Use the facilities on MachineRegisterInfo instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46016 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -43,11 +43,6 @@ char LiveVariables::ID = 0;
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static RegisterPass<LiveVariables> X("livevars", "Live Variable Analysis");
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void LiveVariables::VarInfo::dump() const {
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cerr << "Register Defined by: ";
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if (DefInst)
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cerr << *DefInst;
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else
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cerr << "<null>\n";
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cerr << " Alive in blocks: ";
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for (unsigned i = 0, e = AliveBlocks.size(); i != e; ++i)
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if (AliveBlocks[i]) cerr << i << ", ";
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@ -117,11 +112,13 @@ bool LiveVariables::ModifiesRegister(MachineInstr *MI, unsigned Reg) const {
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return false;
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}
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void LiveVariables::MarkVirtRegAliveInBlock(VarInfo &VRInfo,
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void LiveVariables::MarkVirtRegAliveInBlock(unsigned reg,
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MachineBasicBlock *MBB,
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std::vector<MachineBasicBlock*> &WorkList) {
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unsigned BBNum = MBB->getNumber();
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VarInfo& VRInfo = getVarInfo(reg);
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// Check to see if this basic block is one of the killing blocks. If so,
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// remove it...
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for (unsigned i = 0, e = VRInfo.Kills.size(); i != e; ++i)
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@ -130,7 +127,8 @@ void LiveVariables::MarkVirtRegAliveInBlock(VarInfo &VRInfo,
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break;
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}
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if (MBB == VRInfo.DefInst->getParent()) return; // Terminate recursion
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MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
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if (MBB == MRI.getVRegDef(reg)->getParent()) return; // Terminate recursion
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if (VRInfo.AliveBlocks[BBNum])
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return; // We already know the block is live
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@ -143,24 +141,26 @@ void LiveVariables::MarkVirtRegAliveInBlock(VarInfo &VRInfo,
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WorkList.push_back(*PI);
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}
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void LiveVariables::MarkVirtRegAliveInBlock(VarInfo &VRInfo,
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void LiveVariables::MarkVirtRegAliveInBlock(unsigned reg,
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MachineBasicBlock *MBB) {
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std::vector<MachineBasicBlock*> WorkList;
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MarkVirtRegAliveInBlock(VRInfo, MBB, WorkList);
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MarkVirtRegAliveInBlock(reg, MBB, WorkList);
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while (!WorkList.empty()) {
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MachineBasicBlock *Pred = WorkList.back();
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WorkList.pop_back();
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MarkVirtRegAliveInBlock(VRInfo, Pred, WorkList);
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MarkVirtRegAliveInBlock(reg, Pred, WorkList);
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}
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}
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void LiveVariables::HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
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void LiveVariables::HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
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MachineInstr *MI) {
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assert(VRInfo.DefInst && "Register use before def!");
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MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
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assert(MRI.getVRegDef(reg) && "Register use before def!");
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unsigned BBNum = MBB->getNumber();
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VarInfo& VRInfo = getVarInfo(reg);
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VRInfo.UsedBlocks[BBNum] = true;
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VRInfo.NumUses++;
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@ -177,7 +177,7 @@ void LiveVariables::HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
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assert(VRInfo.Kills[i]->getParent() != MBB && "entry should be at end!");
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#endif
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assert(MBB != VRInfo.DefInst->getParent() &&
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assert(MBB != MRI.getVRegDef(reg)->getParent() &&
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"Should have kill for defblock!");
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// Add a new kill entry for this basic block.
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@ -190,7 +190,7 @@ void LiveVariables::HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
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// Update all dominating blocks to mark them known live.
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for (MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(),
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E = MBB->pred_end(); PI != E; ++PI)
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MarkVirtRegAliveInBlock(VRInfo, *PI);
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MarkVirtRegAliveInBlock(reg, *PI);
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}
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bool LiveVariables::addRegisterKilled(unsigned IncomingReg, MachineInstr *MI,
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@ -489,7 +489,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
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MachineOperand &MO = MI->getOperand(i);
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if (MO.isRegister() && MO.isUse() && MO.getReg()) {
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if (MRegisterInfo::isVirtualRegister(MO.getReg())){
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HandleVirtRegUse(getVarInfo(MO.getReg()), MBB, MI);
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HandleVirtRegUse(MO.getReg(), MBB, MI);
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} else if (MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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!ReservedRegisters[MO.getReg()]) {
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HandlePhysRegUse(MO.getReg(), MI);
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@ -503,9 +503,6 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
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if (MO.isRegister() && MO.isDef() && MO.getReg()) {
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if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
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VarInfo &VRInfo = getVarInfo(MO.getReg());
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assert(VRInfo.DefInst == 0 && "Variable multiply defined!");
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VRInfo.DefInst = MI;
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// Defaults to dead
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VRInfo.Kills.push_back(MI);
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} else if (MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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@ -525,11 +522,8 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
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for (SmallVector<unsigned, 4>::iterator I = VarInfoVec.begin(),
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E = VarInfoVec.end(); I != E; ++I) {
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VarInfo& VRInfo = getVarInfo(*I);
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assert(VRInfo.DefInst && "Register use before def (or no def)!");
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// Only mark it alive only in the block we are representing.
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MarkVirtRegAliveInBlock(VRInfo, MBB);
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MarkVirtRegAliveInBlock(*I, MBB);
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}
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}
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@ -566,9 +560,11 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
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// Convert and transfer the dead / killed information we have gathered into
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// VirtRegInfo onto MI's.
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//
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MachineRegisterInfo& MRI = mf.getRegInfo();
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for (unsigned i = 0, e1 = VirtRegInfo.size(); i != e1; ++i)
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for (unsigned j = 0, e2 = VirtRegInfo[i].Kills.size(); j != e2; ++j) {
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if (VirtRegInfo[i].Kills[j] == VirtRegInfo[i].DefInst)
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if (VirtRegInfo[i].Kills[j] == MRI.getVRegDef(i +
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MRegisterInfo::FirstVirtualRegister))
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addRegisterDead(i + MRegisterInfo::FirstVirtualRegister,
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VirtRegInfo[i].Kills[j], RegInfo);
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else
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@ -612,9 +608,6 @@ void LiveVariables::instructionChanged(MachineInstr *OldMI,
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MO.setIsDead(false);
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addVirtualRegisterDead(Reg, NewMI);
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}
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// Update the defining instruction.
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if (VI.DefInst == OldMI)
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VI.DefInst = NewMI;
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}
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if (MO.isKill()) {
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MO.setIsKill(false);
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@ -166,10 +166,6 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
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LV->removeVirtualRegistersDead(MPhi);
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}
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// Realize that the destination register is defined by the PHI copy now, not
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// the PHI itself.
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LV->getVarInfo(DestReg).DefInst = PHICopy;
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LV->getVarInfo(IncomingReg).UsedBlocks[MBB.getNumber()] = true;
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}
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@ -199,10 +199,6 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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MachineBasicBlock::iterator prevMi = prior(mi);
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DOUT << "\t\tprepend:\t"; DEBUG(prevMi->print(*cerr.stream(), &TM));
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// Update live variables for regA
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LiveVariables::VarInfo& varInfo = LV.getVarInfo(regA);
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varInfo.DefInst = prevMi;
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// update live variables for regB
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LiveVariables::VarInfo& varInfoB = LV.getVarInfo(regB);
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// regB is used in this BB.
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@ -289,9 +289,6 @@ ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
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MachineInstr *NewMI = (Reg == WBReg) ? UpdateMI : MemMI;
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if (MO.isDead())
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LV.addVirtualRegisterDead(Reg, NewMI);
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// Update the defining instruction.
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if (VI.DefInst == MI)
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VI.DefInst = NewMI;
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}
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if (MO.isUse() && MO.isKill()) {
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for (unsigned j = 0; j < 2; ++j) {
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