6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-14 11:32:34 +00:00
Code Issues Projects Releases Wiki Activity

ARM parsing and encoding for ADR.

Browse Source 
The label does not have a '#' prefix. Add parsing and encoding tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136360 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-07-28 16:33:54 +00:00
parent 19b9d6912a
commit 70a0915cd1
2 changed files with 14 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/ARM/ARMInstrInfo.td
View File

@ -1436,7 +1436,7 @@ let neverHasSideEffects = 1, isReMaterializable = 1 in
// the instruction. The {24-21} opcode bits are set by the fixup, as we don't
// know until then which form of the instruction will be used.
def ADR : AI1<{0,?,?,0}, (outs GPR:$Rd), (ins adrlabel:$label),
MiscFrm, IIC_iALUi, "adr", "\t$Rd, #$label", []> {
MiscFrm, IIC_iALUi, "adr", "\t$Rd, $label", []> {
bits<4> Rd;
bits<12> label;
let Inst{27-25} = 0b001;

14
test/MC/ARM/basic-arm-instructions.s
View File

@ -123,8 +123,20 @@ _func:
@------------------------------------------------------------------------------
@ FIXME: ADR
@ ADR
@------------------------------------------------------------------------------
Lback:
adr r2, Lback
adr r3, Lforward
Lforward:
@ CHECK: Lback:
@ CHECK: adr r2, Lback @ encoding: [0bAAAAAAA0,0x20'A',0x0f'A',0b1110001A]
@ CHECK: @ fixup A - offset: 0, value: Lback, kind: fixup_arm_adr_pcrel_12
@ CHECK: adr r3, Lforward @ encoding: [0bAAAAAAA0,0x30'A',0x0f'A',0b1110001A]
@ CHECK: @ fixup A - offset: 0, value: Lforward, kind: fixup_arm_adr_pcrel_12
@ CHECK: Lforward:
@------------------------------------------------------------------------------
@ ADD