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Do not assert on too wide splats we don't support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80409 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2468,10 +2468,12 @@ static SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) {
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unsigned SplatBitSize;
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bool HasAnyUndefs;
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if (BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs)) {
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SDValue Val = isVMOVSplat(SplatBits.getZExtValue(),
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SplatUndef.getZExtValue(), SplatBitSize, DAG);
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if (Val.getNode())
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return BuildSplat(Val, VT, DAG, dl);
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if (SplatBitSize <= 64) {
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SDValue Val = isVMOVSplat(SplatBits.getZExtValue(),
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SplatUndef.getZExtValue(), SplatBitSize, DAG);
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if (Val.getNode())
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return BuildSplat(Val, VT, DAG, dl);
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}
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}
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// If there are only 2 elements in a 128-bit vector, insert them into an
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23
test/CodeGen/ARM/2009-08-29-TooLongSplat.ll
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23
test/CodeGen/ARM/2009-08-29-TooLongSplat.ll
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@ -0,0 +1,23 @@
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; RUN: llvm-as < %s | llc -mattr=+neon
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
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target triple = "thumbv7-elf"
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define arm_apcscc void @aaa() nounwind {
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entry:
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%0 = fmul <4 x float> undef, <float 1.000000e+00, float 1.000000e+01, float 1.000000e+02, float 0x3EB0C6F7A0000000> ; <<4 x float>> [#uses=1]
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%tmp31 = extractelement <4 x float> %0, i32 0 ; <float> [#uses=1]
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%1 = fpext float %tmp31 to double ; <double> [#uses=1]
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%2 = fsub double 1.000000e+00, %1 ; <double> [#uses=1]
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%3 = fdiv double %2, 1.000000e+00 ; <double> [#uses=1]
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%4 = tail call double @fabs(double %3) nounwind readnone ; <double> [#uses=1]
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%5 = fcmp ogt double %4, 1.000000e-05 ; <i1> [#uses=1]
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br i1 %5, label %bb, label %bb7
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bb: ; preds = %entry
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unreachable
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bb7: ; preds = %entry
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unreachable
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}
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declare double @fabs(double)
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