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Ignore register mask operands when lowering instructions to MC.

Browse Source 
This is similar to implicit register operands.  MC doesn't understand
register liveness and call clobbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148437 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-01-18 23:52:19 +00:00
parent 9cf37e8b48
commit 71f0fc1ca8
6 changed files with 17 additions and 1 deletions
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3
lib/Target/ARM/ARMMCInstLower.cpp
View File

@ -107,6 +107,9 @@ bool ARMAsmPrinter::lowerOperand(const MachineOperand &MO,
MCOp = MCOperand::CreateFPImm(Val.convertToDouble());
break;
}
case MachineOperand::MO_RegisterMask:
// Ignore call clobbers.
return false;
}
return true;
}

5
lib/Target/MBlaze/MBlazeMCInstLower.cpp
View File

@ -150,7 +150,7 @@ void MBlazeMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
case MachineOperand::MO_BlockAddress:
MCOp = LowerSymbolOperand(MO, GetBlockAddressSymbol(MO));
break;
case MachineOperand::MO_FPImmediate:
case MachineOperand::MO_FPImmediate: {
bool ignored;
APFloat FVal = MO.getFPImm()->getValueAPF();
FVal.convert(APFloat::IEEEsingle, APFloat::rmTowardZero, &ignored);
@ -160,6 +160,9 @@ void MBlazeMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
MCOp = MCOperand::CreateImm(Val);
break;
}
case MachineOperand::MO_RegisterMask:
continue;
}
OutMI.addOperand(MCOp);
}

3
lib/Target/MSP430/MSP430MCInstLower.cpp
View File

@ -143,6 +143,9 @@ void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
break;
case MachineOperand::MO_BlockAddress:
MCOp = LowerSymbolOperand(MO, GetBlockAddressSymbol(MO));
break;
case MachineOperand::MO_RegisterMask:
continue;
}
OutMI.addOperand(MCOp);

2
lib/Target/Mips/MipsMCInstLower.cpp
View File

@ -192,6 +192,8 @@ MCOperand MipsMCInstLower::LowerOperand(const MachineOperand& MO,
case MachineOperand::MO_ConstantPoolIndex:
case MachineOperand::MO_BlockAddress:
return LowerSymbolOperand(MO, MOTy, offset);
case MachineOperand::MO_RegisterMask:
break;
}
return MCOperand();

2
lib/Target/PowerPC/PPCMCInstLower.cpp
View File

@ -166,6 +166,8 @@ void llvm::LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
MCOp = GetSymbolRef(MO,AP.GetBlockAddressSymbol(MO.getBlockAddress()),AP,
isDarwin);
break;
case MachineOperand::MO_RegisterMask:
continue;
}
OutMI.addOperand(MCOp);

3
lib/Target/X86/X86MCInstLower.cpp
View File

@ -335,6 +335,9 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
MCOp = LowerSymbolOperand(MO,
AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress()));
break;
case MachineOperand::MO_RegisterMask:
// Ignore call clobbers.
continue;
}
OutMI.addOperand(MCOp);