Ignore register mask operands when lowering instructions to MC.

This is similar to implicit register operands.  MC doesn't understand
register liveness and call clobbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148437 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2012-01-18 23:52:19 +00:00
parent 9cf37e8b48
commit 71f0fc1ca8
6 changed files with 17 additions and 1 deletions

View File

@@ -150,7 +150,7 @@ void MBlazeMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
case MachineOperand::MO_BlockAddress:
MCOp = LowerSymbolOperand(MO, GetBlockAddressSymbol(MO));
break;
case MachineOperand::MO_FPImmediate:
case MachineOperand::MO_FPImmediate: {
bool ignored;
APFloat FVal = MO.getFPImm()->getValueAPF();
FVal.convert(APFloat::IEEEsingle, APFloat::rmTowardZero, &ignored);
@@ -160,6 +160,9 @@ void MBlazeMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
MCOp = MCOperand::CreateImm(Val);
break;
}
case MachineOperand::MO_RegisterMask:
continue;
}
OutMI.addOperand(MCOp);
}