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Ignore register mask operands when lowering instructions to MC.
This is similar to implicit register operands. MC doesn't understand register liveness and call clobbers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148437 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -150,7 +150,7 @@ void MBlazeMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
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case MachineOperand::MO_BlockAddress:
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MCOp = LowerSymbolOperand(MO, GetBlockAddressSymbol(MO));
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break;
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case MachineOperand::MO_FPImmediate:
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case MachineOperand::MO_FPImmediate: {
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bool ignored;
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APFloat FVal = MO.getFPImm()->getValueAPF();
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FVal.convert(APFloat::IEEEsingle, APFloat::rmTowardZero, &ignored);
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@@ -160,6 +160,9 @@ void MBlazeMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
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MCOp = MCOperand::CreateImm(Val);
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break;
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}
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case MachineOperand::MO_RegisterMask:
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continue;
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}
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OutMI.addOperand(MCOp);
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}
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