Move if-conversion after all passes that may use register scavenger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37120 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-05-16 20:52:46 +00:00
parent b5f8eff566
commit 75604f81b7
2 changed files with 3 additions and 9 deletions

View File

@ -88,19 +88,14 @@ bool ARMTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
return false;
}
bool ARMTargetMachine::addPostRegAlloc(FunctionPassManager &PM, bool Fast) {
if (Fast || !EnableIfConversion || Subtarget.isThumb())
return false;
PM.add(createIfConverterPass());
return true;
}
bool ARMTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
// FIXME: temporarily disabling load / store optimization pass for Thumb mode.
if (!Fast && !DisableLdStOpti && !Subtarget.isThumb())
PM.add(createARMLoadStoreOptimizationPass());
if (!Fast && EnableIfConversion && !Subtarget.isThumb())
PM.add(createIfConverterPass());
PM.add(createARMConstantIslandPass());
return true;
}

View File

@ -53,7 +53,6 @@ public:
// Pass Pipeline Configuration
virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast);
virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
std::ostream &Out);