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Minor code simplifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77768 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -131,7 +131,6 @@ InstructionSelect()
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/// getGlobalBaseReg - Output the instructions required to put the
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/// GOT address into a register.
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SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
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MachineFunction *MF = BB->getParent();
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unsigned GlobalBaseReg = getInstrInfo()->getGlobalBaseReg(MF);
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return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
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}
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@ -142,10 +142,6 @@ namespace {
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/// make the right decision when generating code for different targets.
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const X86Subtarget *Subtarget;
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/// CurBB - Current BB being isel'd.
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///
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MachineBasicBlock *CurBB;
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/// OptForSize - If true, selector should try to optimize for code size
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/// instead of performance.
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bool OptForSize;
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@ -639,8 +635,7 @@ void X86DAGToDAGISel::PreprocessForFPConvert() {
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/// InstructionSelectBasicBlock - This callback is invoked by SelectionDAGISel
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/// when it has created a SelectionDAG for us to codegen.
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void X86DAGToDAGISel::InstructionSelect() {
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CurBB = BB; // BB can change as result of isel.
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const Function *F = CurDAG->getMachineFunction().getFunction();
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const Function *F = MF->getFunction();
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OptForSize = F->hasFnAttr(Attribute::OptimizeForSize);
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DEBUG(BB->dump());
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@ -1405,7 +1400,6 @@ bool X86DAGToDAGISel::TryFoldLoad(SDValue P, SDValue N,
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/// initialize the global base register, if necessary.
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///
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SDNode *X86DAGToDAGISel::getGlobalBaseReg() {
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MachineFunction *MF = CurBB->getParent();
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unsigned GlobalBaseReg = getInstrInfo()->getGlobalBaseReg(MF);
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return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
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}
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