6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-14 11:32:34 +00:00
Code Issues Projects Releases Wiki Activity

[FastISel][AArch64] Fix a missing nullptr check in 'computeAddress'.

Browse Source 
The load/store value type is currently not available when lowering the memcpy
intrinsic. Add the missing nullptr check to support this in 'computeAddress'.

Fixes rdar://problem/19178947.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223818 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Juergen Ributzka 2014-12-09 19:44:38 +00:00
parent 260731d108
commit 772744826c
2 changed files with 16 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/AArch64/AArch64FastISel.cpp
View File

@ -753,7 +753,7 @@ bool AArch64FastISel::computeAddress(const Value *Obj, Address &Addr, Type *Ty)
if (Addr.getOffsetReg())
break;
if (DL.getTypeSizeInBits(Ty) != 8)
if (!Ty || DL.getTypeSizeInBits(Ty) != 8)
break;
const Value *LHS = U->getOperand(0);

15
test/CodeGen/AArch64/fast-isel-memcpy.ll Normal file
View File

@ -0,0 +1,15 @@
; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s
; Test that we don't segfault.
; CHECK-LABEL: test
; CHECK: ldr [[REG1:x[0-9]+]], [x1]
; CHECK-NEXT: and [[REG2:x[0-9]+]], x0, #0x7fffffffffffffff
; CHECK-NEXT: str [[REG1]], {{\[}}[[REG2]]{{\]}}
define void @test(i64 %a, i8* %b) {
%1 = and i64 %a, 9223372036854775807
%2 = inttoptr i64 %1 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %2, i8* %b, i64 8, i32 8, i1 false)
ret void
}
declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i32, i1)