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Add CodeGen tests for the recent SelectionDAG transforms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21292 91177308-0d34-0410-b5e6-96231b3b80d8
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test/CodeGen/PowerPC/select_lt0.ll
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45
test/CodeGen/PowerPC/select_lt0.ll
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@ -0,0 +1,45 @@
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; RUN: llvm-as < %s | llc -march=ppc32 -enable-ppc-pattern-isel | not grep cmp
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int %seli32_1(int %a) {
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entry:
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%tmp.1 = setlt int %a, 0
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%retval = select bool %tmp.1, int 5, int 0
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ret int %retval
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}
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int %seli32_2(int %a, int %b) {
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entry:
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%tmp.1 = setlt int %a, 0
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%retval = select bool %tmp.1, int %b, int 0
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ret int %retval
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}
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int %seli32_3(int %a, short %b) {
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entry:
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%tmp.2 = cast short %b to int
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%tmp.1 = setlt int %a, 0
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%retval = select bool %tmp.1, int %tmp.2, int 0
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ret int %retval
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}
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int %seli32_4(int %a, ushort %b) {
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entry:
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%tmp.2 = cast ushort %b to int
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%tmp.1 = setlt int %a, 0
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%retval = select bool %tmp.1, int %tmp.2, int 0
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ret int %retval
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}
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short %seli16_1(short %a) {
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entry:
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%tmp.1 = setlt short %a, 0
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%retval = select bool %tmp.1, short 7, short 0
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ret short %retval
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}
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short %seli16_2(int %a, short %b) {
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entry:
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%tmp.1 = setlt int %a, 0
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%retval = select bool %tmp.1, short %b, short 0
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ret short %retval
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}
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8
test/CodeGen/PowerPC/setcc_no_zext.ll
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8
test/CodeGen/PowerPC/setcc_no_zext.ll
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@ -0,0 +1,8 @@
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; RUN: llvm-as < %s | llc -march=ppc32 -enable-ppc-pattern-isel | not grep rlwinm
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int %setcc_one_or_zero(int* %a) {
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entry:
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%tmp.1 = setne int* %a, null
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%inc.1 = cast bool %tmp.1 to int
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ret int %inc.1
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}
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