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Enable machine code verification after PreSched2 passes.
The late scheduler depends on accurate liveness information if it is breaking anti-dependencies, so we should be able to verify it. Relax the terminator checking in the machine code verifier so it can handle the basic blocks created by if conversion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153614 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -609,7 +609,9 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) {
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}
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}
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// Ensure non-terminators don't follow terminators.
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// Ensure non-terminators don't follow terminators.
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if (MI->isTerminator()) {
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// Ignore predicated terminators formed by if conversion.
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// FIXME: If conversion shouldn't need to violate this rule.
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if (MI->isTerminator() && !TII->isPredicated(MI)) {
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if (!FirstTerminator)
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if (!FirstTerminator)
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FirstTerminator = MI;
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FirstTerminator = MI;
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} else if (FirstTerminator) {
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} else if (FirstTerminator) {
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@ -398,7 +398,7 @@ void TargetPassConfig::addMachinePasses() {
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// Run pre-sched2 passes.
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// Run pre-sched2 passes.
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if (addPreSched2())
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if (addPreSched2())
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printNoVerify("After PreSched2 passes");
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printAndVerify("After PreSched2 passes");
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// Second pass scheduler.
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// Second pass scheduler.
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if (getOptLevel() != CodeGenOpt::None) {
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if (getOptLevel() != CodeGenOpt::None) {
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