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Allow i32/i64 for 'f' constraint on PowerPC.

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This fixes PR12757.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166943 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ulrich Weigand 2012-10-29 17:49:34 +00:00
parent 7ed4f94c13
commit 78dab643e0
2 changed files with 16 additions and 2 deletions
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4
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -6449,9 +6449,9 @@ PPCTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
return std::make_pair(0U, &PPC::G8RCRegClass);
return std::make_pair(0U, &PPC::GPRCRegClass);
case 'f':
if (VT == MVT::f32)
if (VT == MVT::f32 || VT == MVT::i32)
return std::make_pair(0U, &PPC::F4RCRegClass);
if (VT == MVT::f64)
if (VT == MVT::f64 || VT == MVT::i64)
return std::make_pair(0U, &PPC::F8RCRegClass);
break;
case 'v':

14
test/CodeGen/PowerPC/pr12757.ll Normal file
View File

@ -0,0 +1,14 @@
; RUN: llc < %s | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
define i32 @__flt_rounds() nounwind {
entry:
%0 = tail call i64 asm sideeffect "mffs $0", "=f"() nounwind
%conv = trunc i64 %0 to i32
ret i32 %conv
}
; CHECK: @__flt_rounds
; CHECK: mffs