Fix decoding of ARM-mode STRH.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137499 91177308-0d34-0410-b5e6-96231b3b80d8
2025-08-05 13:26:55 +00:00 · 2011-08-12 20:02:50 +00:00
parent c513309224
commit 79628e92e1
3 changed files with 6 additions and 0 deletions
--- a/lib/Target/ARM/ARMInstrFormats.td
+++ b/lib/Target/ARM/ARMInstrFormats.td
@@ -664,6 +664,7 @@ class AI3str<bits<4> op, dag oops, dag iops, Format f, InstrItinClass itin,
  let Inst{11-8}  = addr{7-4};    // imm7_4/zero
  let Inst{7-4}   = op;
  let Inst{3-0}   = addr{3-0};    // imm3_0/Rm
+  let DecoderMethod = "DecodeAddrMode3Instruction";
 }

 // Pre-indexed stores