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Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55777 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2008-09-04 16:48:33 +00:00
parent 6448d91ad1
commit 79924eb6f5
2 changed files with 5 additions and 3 deletions
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6
lib/Target/X86/X86FastISel.cpp
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@ -157,10 +157,10 @@ bool X86FastISel::X86SelectStore(Instruction* I) {
X86AddressMode AM;
if (Op1)
// Address is in register.
AM.Base.Reg = Op0;
AM.Base.Reg = Op1;
else
AM.GV = cast<GlobalValue>(V);
addFullAddress(BuildMI(MBB, TII.get(Opc)), AM);
addFullAddress(BuildMI(MBB, TII.get(Opc)), AM).addReg(Op0);
return true;
}
@ -255,6 +255,8 @@ X86FastISel::TargetSelectInstruction(Instruction *I) {
default: break;
case Instruction::Load:
return X86SelectLoad(I);
case Instruction::Store:
return X86SelectStore(I);
}
return false;

2
test/CodeGen/X86/fast-isel-mem.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -fast-isel -mtriple=i386-apple-darwin -mattr=sse2 | \
; RUN: grep mov | grep lazy_ptr | count 2
; RUN: grep mov | grep lazy_ptr | count 1
@src = external global i32