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When the "true" and "false" blocks of a diamond if-conversion are the same,
do not double-count the duplicate instructions by counting once from the beginning and again from the end. Keep track of where the duplicates from the beginning ended and don't go past that point when counting duplicates at the end. Radar 8589805. This change causes one of the MC/ARM/simple-fp-encoding tests to produce different (better!) code without the vmovne instruction being tested. I changed the test to produce vmovne and vmoveq instructions but moving between register files in the opposite direction. That's not quite the same but predicated versions of those instructions weren't being tested before, so at least the test coverage is not any worse, just different. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117333 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -520,18 +520,6 @@ bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
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return TExit && TExit == FalseBBI.BB;
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}
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static
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MachineBasicBlock::iterator firstNonBranchInst(MachineBasicBlock *BB,
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const TargetInstrInfo *TII) {
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MachineBasicBlock::iterator I = BB->end();
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while (I != BB->begin()) {
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--I;
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if (!I->getDesc().isBranch())
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break;
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}
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return I;
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}
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/// ValidDiamond - Returns true if the 'true' and 'false' blocks (along
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/// with their common predecessor) forms a valid diamond shape for ifcvt.
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bool IfConverter::ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
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@ -560,64 +548,70 @@ bool IfConverter::ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
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(TrueBBI.ClobbersPred && FalseBBI.ClobbersPred))
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return false;
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MachineBasicBlock::iterator TI = TrueBBI.BB->begin();
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MachineBasicBlock::iterator FI = FalseBBI.BB->begin();
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MachineBasicBlock::iterator TIE = TrueBBI.BB->end();
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MachineBasicBlock::iterator FIE = FalseBBI.BB->end();
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// Skip dbg_value instructions
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while (TI != TIE && TI->isDebugValue())
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++TI;
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while (FI != FIE && FI->isDebugValue())
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++FI;
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while (TI != TIE && FI != FIE) {
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// Skip dbg_value instructions. These do not count.
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if (TI->isDebugValue()) {
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while (TI != TIE && TI->isDebugValue())
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++TI;
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if (TI == TIE)
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break;
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}
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if (FI->isDebugValue()) {
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while (FI != FIE && FI->isDebugValue())
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++FI;
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if (FI == FIE)
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break;
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}
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if (!TI->isIdenticalTo(FI))
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break;
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++Dups1;
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++TI;
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++FI;
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}
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TI = firstNonBranchInst(TrueBBI.BB, TII);
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FI = firstNonBranchInst(FalseBBI.BB, TII);
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// Count duplicate instructions at the beginning of the true and false blocks.
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MachineBasicBlock::iterator TIB = TrueBBI.BB->begin();
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MachineBasicBlock::iterator FIB = FalseBBI.BB->begin();
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// Skip dbg_value instructions at end of the bb's.
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while (TI != TIB && TI->isDebugValue())
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--TI;
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while (FI != FIB && FI->isDebugValue())
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--FI;
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while (TI != TIB && FI != FIB) {
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MachineBasicBlock::iterator TIE = TrueBBI.BB->end();
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MachineBasicBlock::iterator FIE = FalseBBI.BB->end();
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while (TIB != TIE && FIB != FIE) {
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// Skip dbg_value instructions. These do not count.
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if (TI->isDebugValue()) {
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while (TI != TIB && TI->isDebugValue())
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--TI;
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if (TI == TIB)
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if (TIB->isDebugValue()) {
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while (TIB != TIE && TIB->isDebugValue())
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++TIB;
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if (TIB == TIE)
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break;
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}
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if (FI->isDebugValue()) {
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while (FI != FIB && FI->isDebugValue())
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--FI;
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if (FI == FIB)
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if (FIB->isDebugValue()) {
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while (FIB != FIE && FIB->isDebugValue())
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++FIB;
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if (FIB == FIE)
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break;
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}
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if (!TI->isIdenticalTo(FI))
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if (!TIB->isIdenticalTo(FIB))
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break;
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++Dups1;
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++TIB;
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++FIB;
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}
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// Now, in preparation for counting duplicate instructions at the ends of the
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// blocks, move the end iterators up past any branch instructions.
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while (TIE != TIB) {
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--TIE;
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if (!TIE->getDesc().isBranch())
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break;
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}
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while (FIE != FIB) {
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--FIE;
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if (!FIE->getDesc().isBranch())
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break;
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}
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// If Dups1 includes all of a block, then don't count duplicate
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// instructions at the end of the blocks.
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if (TIB == TIE || FIB == FIE)
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return true;
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// Count duplicate instructions at the ends of the blocks.
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while (TIE != TIB && FIE != FIB) {
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// Skip dbg_value instructions. These do not count.
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if (TIE->isDebugValue()) {
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while (TIE != TIB && TIE->isDebugValue())
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--TIE;
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if (TIE == TIB)
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break;
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}
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if (FIE->isDebugValue()) {
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while (FIE != FIB && FIE->isDebugValue())
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--FIE;
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if (FIE == FIB)
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break;
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}
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if (!TIE->isIdenticalTo(FIE))
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break;
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++Dups2;
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--TI;
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--FI;
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--TIE;
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--FIE;
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}
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return true;
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31
test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll
Normal file
31
test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll
Normal file
@ -0,0 +1,31 @@
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; RUN: llc < %s -mtriple=armv6-apple-darwin -mcpu=arm1136jf-s | FileCheck %s
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; Radar 8589805: Counting the number of microcoded operations, such as for an
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; LDM instruction, was causing an assertion failure because the microop count
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; was being treated as an instruction count.
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; CHECK: ldmia
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; CHECK: ldmia
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; CHECK: ldmia
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; CHECK: ldmia
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define i32 @test(i32 %x) {
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entry:
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%0 = tail call signext i16 undef(i32* undef)
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switch i32 undef, label %bb3 [
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i32 0, label %bb4
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i32 1, label %bb1
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i32 2, label %bb2
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]
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bb1:
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ret i32 1
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bb2:
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ret i32 2
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bb3:
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ret i32 1
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bb4:
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ret i32 3
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}
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@ -349,16 +349,16 @@ return: ; preds = %entry
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ret double %a
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}
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define float @f99(float %a, i32 %i) nounwind readnone {
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define float @f99(float %a, float %b, i32 %i) nounwind readnone {
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entry:
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%cmp = icmp eq i32 %i, 3
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br i1 %cmp, label %if.end, label %return
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if.end: ; preds = %entry
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; CHECK: f99
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; CHECK: vmovne r0, s0 @ encoding: [0x10,0x0a,0x10,0x1e]
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%sub = fsub float -0.000000e+00, %a
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ret float %sub
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; CHECK: vmovne s0, r0 @ encoding: [0x10,0x0a,0x00,0x1e]
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; CHECK: vmoveq s0, r1 @ encoding: [0x10,0x1a,0x00,0x0e]
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ret float %b
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return: ; preds = %entry
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ret float %a
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