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Ensure that each these functions generates a sh[rl]d instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19682 91177308-0d34-0410-b5e6-96231b3b80d8
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test/CodeGen/X86/shift-double.llx
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22
test/CodeGen/X86/shift-double.llx
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; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel -disable-pattern-isel=0 | grep sh[lr]d | wc -l | grep 4
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long %test1(long %X, ubyte %C) {
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%Y = shl long %X, ubyte %C
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ret long %Y
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}
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long %test2(long %X, ubyte %C) {
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%Y = shr long %X, ubyte %C
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ret long %Y
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}
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ulong %test3(ulong %X, ubyte %C) {
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%Y = shr ulong %X, ubyte %C
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ret ulong %Y
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}
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uint %test4(uint %A, uint %B, ubyte %C) {
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%X = shl uint %A, ubyte %C
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%Cv = sub ubyte 32, %C
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%Y = shr uint %B, ubyte %Cv
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%Z = or uint %Y, %X
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ret uint %Z
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}
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