partial implementation of the ARM Addressing Mode 1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30252 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola
2006-09-11 17:25:40 +00:00
parent 3fc68ccd83
commit 7cca7c5317
5 changed files with 74 additions and 37 deletions
+7 -7
View File
@@ -33,15 +33,15 @@ bool ARMInstrInfo::isMoveInstr(const MachineInstr &MI,
unsigned &SrcReg, unsigned &DstReg) const {
MachineOpCode oc = MI.getOpcode();
switch (oc) {
default:
return false;
case ARM::movrr:
case ARM::MOV:
assert(MI.getNumOperands() == 2 &&
MI.getOperand(0).isRegister() &&
MI.getOperand(1).isRegister() &&
"Invalid ARM MOV instruction");
SrcReg = MI.getOperand(1).getReg();;
DstReg = MI.getOperand(0).getReg();;
return true;
if (MI.getOperand(1).isRegister()) {
SrcReg = MI.getOperand(1).getReg();
DstReg = MI.getOperand(0).getReg();
return true;
}
}
return false;
}