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Reverted r99376. The disassembler will deal with the 2-reg format of these two

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N3VX instructions using special case code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99409 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Johnny Chen 2010-03-24 18:46:34 +00:00
parent 35075a7e81
commit 7d85ac09f8
1 changed files with 0 additions and 3 deletions
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3
lib/Target/ARM/ARMInstrNEON.td
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@ -2778,13 +2778,10 @@ def VSWPq : N2VX<0b11, 0b11, 0b00, 0b10, 0b00000, 1, 0,
// VMOV : Vector Move (Register)
// Mark these as 2-register instructions to help the disassembler.
let F = N2RegFrm, Form = N2RegFrm.Value in {
def VMOVDneon: N3VX<0, 0, 0b10, 0b0001, 0, 1, (outs DPR:$dst), (ins DPR:$src),
IIC_VMOVD, "vmov", "$dst, $src", "", []>;
def VMOVQ : N3VX<0, 0, 0b10, 0b0001, 1, 1, (outs QPR:$dst), (ins QPR:$src),
IIC_VMOVD, "vmov", "$dst, $src", "", []>;
}
// VMOV : Vector Move (Immediate)