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Tidy up since ARM MOVCCi and MOVCCi16 are now pseudos.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127445 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-03-11 01:16:49 +00:00
parent 3906276a8d
commit 7e0e82dcd5
1 changed files with 6 additions and 6 deletions
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12
utils/TableGen/ARMDecoderEmitter.cpp
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@ -1606,12 +1606,12 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI,
// better off using the generic RSCri and RSCrs instructions.
if (Name == "RSCSri" || Name == "RSCSrs") return false;
// MOVCCi, MOVCCi16, FCYPScc, FCYPDcc, FNEGScc, and
// FNEGDcc are used in the compiler to implement conditional moves.
// We can ignore them in favor of their more generic versions of
// instructions. See also SDNode *ARMDAGToDAGISel::Select(SDValue Op).
if (Name == "MOVCCi" || Name == "MOVCCi16" || Name == "FCPYScc" ||
Name == "FCPYDcc" || Name == "FNEGScc" || Name == "FNEGDcc")
// FCYPScc, FCYPDcc, FNEGScc, and FNEGDcc are used in the compiler
// to implement conditional moves. We can ignore them in favor of
// their more generic versions of instructions. See also
// SDNode *ARMDAGToDAGISel::Select(SDValue Op).
if (Name == "FCPYScc" || Name == "FCPYDcc" || Name == "FNEGScc" ||
Name == "FNEGDcc")
return false;
// Ditto for VMOVDcc, VMOVScc, VNEGDcc, and VNEGScc.