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Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117531 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2010-10-28 06:47:08 +00:00
parent 9c3e8e28bd
commit 7e2fe9150f
12 changed files with 96 additions and 31 deletions
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3
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
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@@ -454,6 +454,9 @@ void ScheduleDAGSDNodes::ComputeOperandLatency(SDNode *Def, SDNode *Use,
return;
unsigned DefIdx = Use->getOperand(OpIdx).getResNo();
if (Use->isMachineOpcode())
// Adjust the use operand index by num of defs.
OpIdx += TII->get(Use->getMachineOpcode()).getNumDefs();
int Latency = TII->getOperandLatency(InstrItins, Def, DefIdx, Use, OpIdx);
if (Latency >= 0)
dep.setLatency(Latency);