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X86FastISel support for loading and storing values of type i1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80186 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -195,6 +195,7 @@ bool X86FastISel::X86FastEmitLoad(EVT VT, const X86AddressMode &AM,
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const TargetRegisterClass *RC = NULL;
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switch (VT.getSimpleVT().SimpleTy) {
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default: return false;
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case MVT::i1:
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case MVT::i8:
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Opc = X86::MOV8rm;
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RC = X86::GR8RegisterClass;
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@ -252,6 +253,14 @@ X86FastISel::X86FastEmitStore(EVT VT, unsigned Val,
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switch (VT.getSimpleVT().SimpleTy) {
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case MVT::f80: // No f80 support yet.
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default: return false;
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case MVT::i1: {
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// Mask out all but lowest bit.
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unsigned AndResult = createResultReg(X86::GR8RegisterClass);
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BuildMI(MBB, DL,
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TII.get(X86::AND8ri), AndResult).addReg(Val).addImm(1);
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Val = AndResult;
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}
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// FALLTHROUGH, handling i1 as i8.
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case MVT::i8: Opc = X86::MOV8mr; break;
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case MVT::i16: Opc = X86::MOV16mr; break;
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case MVT::i32: Opc = X86::MOV32mr; break;
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@ -277,8 +286,10 @@ bool X86FastISel::X86FastEmitStore(EVT VT, Value *Val,
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// If this is a store of a simple constant, fold the constant into the store.
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if (ConstantInt *CI = dyn_cast<ConstantInt>(Val)) {
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unsigned Opc = 0;
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bool Signed = true;
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switch (VT.getSimpleVT().SimpleTy) {
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default: break;
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case MVT::i1: Signed = false; // FALLTHROUGH to handle as i8.
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case MVT::i8: Opc = X86::MOV8mi; break;
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case MVT::i16: Opc = X86::MOV16mi; break;
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case MVT::i32: Opc = X86::MOV32mi; break;
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@ -291,7 +302,8 @@ bool X86FastISel::X86FastEmitStore(EVT VT, Value *Val,
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if (Opc) {
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addFullAddress(BuildMI(MBB, DL, TII.get(Opc)), AM)
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.addImm(CI->getSExtValue());
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.addImm(Signed ? CI->getSExtValue() :
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CI->getZExtValue());
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return true;
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}
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}
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@ -606,7 +618,7 @@ bool X86FastISel::X86SelectCallAddress(Value *V, X86AddressMode &AM) {
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/// X86SelectStore - Select and emit code to implement store instructions.
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bool X86FastISel::X86SelectStore(Instruction* I) {
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EVT VT;
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if (!isTypeLegal(I->getOperand(0)->getType(), VT))
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if (!isTypeLegal(I->getOperand(0)->getType(), VT, /*AllowI1=*/true))
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return false;
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X86AddressMode AM;
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@ -620,7 +632,7 @@ bool X86FastISel::X86SelectStore(Instruction* I) {
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///
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bool X86FastISel::X86SelectLoad(Instruction *I) {
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EVT VT;
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if (!isTypeLegal(I->getType(), VT))
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if (!isTypeLegal(I->getType(), VT, /*AllowI1=*/true))
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return false;
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X86AddressMode AM;
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@ -64,3 +64,12 @@ define i8* @inttoptr_i32(i32 %p) nounwind {
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%t = inttoptr i32 %p to i8*
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ret i8* %t
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}
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define void @store_i1(i1* %p, i1 %t) nounwind {
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store i1 %t, i1* %p
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ret void
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}
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define i1 @load_i1(i1* %p) nounwind {
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%t = load i1* %p
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ret i1 %t
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}
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