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Implement split and scalarize for SELECT_CC, fixing PR2504
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52887 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -6895,6 +6895,22 @@ void SelectionDAGLegalize::SplitVectorOp(SDOperand Op, SDOperand &Lo,
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}
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break;
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}
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case ISD::SELECT_CC: {
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SDOperand CondLHS = Node->getOperand(0);
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SDOperand CondRHS = Node->getOperand(1);
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SDOperand CondCode = Node->getOperand(4);
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SDOperand LL, LH, RL, RH;
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SplitVectorOp(Node->getOperand(2), LL, LH);
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SplitVectorOp(Node->getOperand(3), RL, RH);
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// Handle a simple select with vector operands.
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Lo = DAG.getNode(ISD::SELECT_CC, NewVT_Lo, CondLHS, CondRHS,
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LL, RL, CondCode);
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Hi = DAG.getNode(ISD::SELECT_CC, NewVT_Hi, CondLHS, CondRHS,
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LH, RH, CondCode);
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break;
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}
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case ISD::VSETCC: {
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SDOperand LL, LH, RL, RH;
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SplitVectorOp(Node->getOperand(0), LL, LH);
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@ -7122,6 +7138,13 @@ SDOperand SelectionDAGLegalize::ScalarizeVectorOp(SDOperand Op) {
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ScalarizeVectorOp(Op.getOperand(1)),
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ScalarizeVectorOp(Op.getOperand(2)));
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break;
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case ISD::SELECT_CC:
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Result = DAG.getNode(ISD::SELECT_CC, NewVT, Node->getOperand(0),
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Node->getOperand(1),
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ScalarizeVectorOp(Op.getOperand(2)),
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ScalarizeVectorOp(Op.getOperand(3)),
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Node->getOperand(4));
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break;
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case ISD::VSETCC: {
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SDOperand Op0 = ScalarizeVectorOp(Op.getOperand(0));
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SDOperand Op1 = ScalarizeVectorOp(Op.getOperand(1));
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9
test/CodeGen/Generic/select-cc.ll
Normal file
9
test/CodeGen/Generic/select-cc.ll
Normal file
@ -0,0 +1,9 @@
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; RUN: llvm-as < %s | llc
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; PR2504
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define <2 x double> @vector_select(<2 x double> %x, <2 x double> %y) nounwind {
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%x.lo = extractelement <2 x double> %x, i32 0 ; <double> [#uses=1]
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%x.lo.ge = fcmp oge double %x.lo, 0.000000e+00 ; <i1> [#uses=1]
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%a.d = select i1 %x.lo.ge, <2 x double> %y, <2 x double> %x ; <<2 x double>> [#uses=1]
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ret <2 x double> %a.d
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}
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