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Renumber NEON instruction formats to be consecutive.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106927 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson
2010-06-26 00:05:09 +00:00
parent 184723d9be
commit 80d9bc0336
3 changed files with 24 additions and 26 deletions
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24
lib/Target/ARM/ARMBaseInstrInfo.h
View File

@ -123,18 +123,18 @@ namespace ARMII {
NGetLnFrm = 26 << FormShift, NGetLnFrm = 26 << FormShift,
NSetLnFrm = 27 << FormShift, NSetLnFrm = 27 << FormShift,
NDupFrm = 28 << FormShift, NDupFrm = 28 << FormShift,
NLdStFrm = 31 << FormShift, NLdStFrm = 29 << FormShift,
N1RegModImmFrm= 32 << FormShift, N1RegModImmFrm= 30 << FormShift,
N2RegFrm = 33 << FormShift, N2RegFrm = 31 << FormShift,
NVCVTFrm = 34 << FormShift, NVCVTFrm = 32 << FormShift,
NVDupLnFrm = 35 << FormShift, NVDupLnFrm = 33 << FormShift,
N2RegVShLFrm = 36 << FormShift, N2RegVShLFrm = 34 << FormShift,
N2RegVShRFrm = 37 << FormShift, N2RegVShRFrm = 35 << FormShift,
N3RegFrm = 38 << FormShift, N3RegFrm = 36 << FormShift,
N3RegVShFrm = 39 << FormShift, N3RegVShFrm = 37 << FormShift,
NVExtFrm = 40 << FormShift, NVExtFrm = 38 << FormShift,
NVMulSLFrm = 41 << FormShift, NVMulSLFrm = 39 << FormShift,
NVTBLFrm = 42 << FormShift, NVTBLFrm = 40 << FormShift,
//===------------------------------------------------------------------===// //===------------------------------------------------------------------===//
// Misc flags. // Misc flags.

24
lib/Target/ARM/ARMInstrFormats.td
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@ -55,18 +55,18 @@ def MiscFrm : Format<25>;
def NGetLnFrm : Format<26>; def NGetLnFrm : Format<26>;
def NSetLnFrm : Format<27>; def NSetLnFrm : Format<27>;
def NDupFrm : Format<28>; def NDupFrm : Format<28>;
def NLdStFrm : Format<31>; def NLdStFrm : Format<29>;
def N1RegModImmFrm: Format<32>; def N1RegModImmFrm: Format<30>;
def N2RegFrm : Format<33>; def N2RegFrm : Format<31>;
def NVCVTFrm : Format<34>; def NVCVTFrm : Format<32>;
def NVDupLnFrm : Format<35>; def NVDupLnFrm : Format<33>;
def N2RegVShLFrm : Format<36>; def N2RegVShLFrm : Format<34>;
def N2RegVShRFrm : Format<37>; def N2RegVShRFrm : Format<35>;
def N3RegFrm : Format<38>; def N3RegFrm : Format<36>;
def N3RegVShFrm : Format<39>; def N3RegVShFrm : Format<37>;
def NVExtFrm : Format<40>; def NVExtFrm : Format<38>;
def NVMulSLFrm : Format<41>; def NVMulSLFrm : Format<39>;
def NVTBLFrm : Format<42>; def NVTBLFrm : Format<40>;
// Misc flags. // Misc flags.

2
lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
View File

@ -3089,8 +3089,6 @@ static const DisassembleFP FuncPtrs[] = {
&DisassembleNGetLnFrm, &DisassembleNGetLnFrm,
&DisassembleNSetLnFrm, &DisassembleNSetLnFrm,
&DisassembleNDupFrm, &DisassembleNDupFrm,
0,
0,
// VLD and VST (including one lane) Instructions. // VLD and VST (including one lane) Instructions.
&DisassembleNLdSt, &DisassembleNLdSt,