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Track IR ordering of SelectionDAG nodes 4/4.
Unit test cases for -pre-RA-sched=source. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182706 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,4 +1,5 @@
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; RUN: llc -disable-fp-elim -relocation-model=pic < %s
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; RUN: llc -disable-fp-elim -relocation-model=pic -pre-RA-sched=source < %s | FileCheck %s --check-prefix=SOURCE-SCHED
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target triple = "armv6-apple-ios"
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; Reduced from 177.mesa. This test causes a live range split before an LDR_POST instruction.
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@ -11,6 +12,26 @@ for.body.lr.ph: ; preds = %entry
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br label %for.body
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for.body: ; preds = %for.body, %for.body.lr.ph
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; SOURCE-SCHED: str
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; SOURCE-SCHED: add
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; SOURCE-SCHED: sub
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; SOURCE-SCHED: ldr
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; SOURCE-SCHED: ldr
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; SOURCE-SCHED: str
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; SOURCE-SCHED: str
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; SOURCE-SCHED: str
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; SOURCE-SCHED: str
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; SOURCE-SCHED: add
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; SOURCE-SCHED: add
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; SOURCE-SCHED: add
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; SOURCE-SCHED: add
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; SOURCE-SCHED: str
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; SOURCE-SCHED: mov
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; SOURCE-SCHED: bl
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; SOURCE-SCHED: ldr
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; SOURCE-SCHED: ldr
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; SOURCE-SCHED: cmp
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; SOURCE-SCHED: bne
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%i.031 = phi i32 [ 0, %for.body.lr.ph ], [ %0, %for.body ]
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%arrayidx11 = getelementptr float* %t, i32 %i.031
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%arrayidx15 = getelementptr float* %u, i32 %i.031
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@ -1,4 +1,5 @@
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; RUN: llc -march=mipsel < %s
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; RUN: llc -march=mipsel -pre-RA-sched=source < %s | FileCheck %s --check-prefix=SOURCE-SCHED
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@gf0 = external global float
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@gf1 = external global float
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@ -7,6 +8,21 @@
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define float @select_cc_f32(float %a, float %b) nounwind {
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entry:
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; SOURCE-SCHED: lui
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; SOURCE-SCHED: addiu
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; SOURCE-SCHED: addu
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; SOURCE-SCHED: lw
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; SOURCE-SCHED: sw
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; SOURCE-SCHED: lw
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; SOURCE-SCHED: lui
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; SOURCE-SCHED: sw
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; SOURCE-SCHED: addiu
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; SOURCE-SCHED: addiu
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; SOURCE-SCHED: c.olt.s
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; SOURCE-SCHED: movt
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; SOURCE-SCHED: mtc1
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; SOURCE-SCHED: jr
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store float 0.000000e+00, float* @gf0, align 4
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store float 1.000000e+00, float* @gf1, align 4
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%cmp = fcmp olt float %a, %b
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@ -1,4 +1,5 @@
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; RUN: llc < %s -march=x86
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; RUN: llc -pre-RA-sched=source < %s -march=x86 | FileCheck %s --check-prefix=SOURCE-SCHED
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; PR2748
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@g_73 = external global i32 ; <i32*> [#uses=1]
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@ -6,6 +7,17 @@
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define i32 @func_44(i16 signext %p_46) nounwind {
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entry:
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; SOURCE-SCHED: subl
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; SOURCE-SCHED: movl
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; SOURCE-SCHED: sarl
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; SOURCE-SCHED: cmpl
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; SOURCE-SCHED: setg
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; SOURCE-SCHED: movzbl
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; SOURCE-SCHED: movb
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; SOURCE-SCHED: xorl
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; SOURCE-SCHED: subl
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; SOURCE-SCHED: testb
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; SOURCE-SCHED: jne
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%0 = load i32* @g_5, align 4 ; <i32> [#uses=1]
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%1 = ashr i32 %0, 1 ; <i32> [#uses=1]
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%2 = icmp sgt i32 %1, 1 ; <i1> [#uses=1]
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