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Add support for the PowerPC-specific inline asm Z constraint and y modifier.
The Z constraint specifies an r+r memory address, and the y modifier expands to the "r, r" in the asm string. For this initial implementation, the base register is forced to r0 (which has the special meaning of 0 for r+r addressing on PowerPC) and the full address is taken in the second register. In the future, this should be improved. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167388 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -284,8 +284,22 @@ bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode,
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raw_ostream &O) {
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if (ExtraCode && ExtraCode[0])
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return true; // Unknown modifier.
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if (ExtraCode && ExtraCode[0]) {
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if (ExtraCode[1] != 0) return true; // Unknown modifier.
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switch (ExtraCode[0]) {
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default: return true; // Unknown modifier.
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case 'y': // A memory reference for an X-form instruction
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{
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const char *RegName = "r0";
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if (!Subtarget.isDarwin()) RegName = stripRegisterPrefix(RegName);
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O << RegName << ", ";
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printOperand(MI, OpNo, O);
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return false;
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}
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}
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}
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assert(MI->getOperand(OpNo).isReg());
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O << "0(";
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printOperand(MI, OpNo, O);
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@ -6443,6 +6443,14 @@ PPCTargetLowering::getConstraintType(const std::string &Constraint) const {
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case 'v':
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case 'y':
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return C_RegisterClass;
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case 'Z':
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// FIXME: While Z does indicate a memory constraint, it specifically
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// indicates an r+r address (used in conjunction with the 'y' modifier
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// in the replacement string). Currently, we're forcing the base
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// register to be r0 in the asm printer (which is interpreted as zero)
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// and forming the complete address in the second register. This is
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// suboptimal.
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return C_Memory;
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}
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}
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return TargetLowering::getConstraintType(Constraint);
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@ -6485,6 +6493,9 @@ PPCTargetLowering::getSingleConstraintMatchWeight(
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case 'y':
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weight = CW_Register;
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break;
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case 'Z':
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weight = CW_Memory;
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break;
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}
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return weight;
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}
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14
test/CodeGen/PowerPC/asm-Zy.ll
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14
test/CodeGen/PowerPC/asm-Zy.ll
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@ -0,0 +1,14 @@
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-bgq-linux"
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; RUN: llc < %s -march=ppc64 -mcpu=a2 | FileCheck %s
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define i32 @zytest(i32 %a) nounwind {
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entry:
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; CHECK: @zytest
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%r = call i32 asm "lwbrx $0, ${1:y}", "=r,Z"(i32 %a) nounwind, !srcloc !0
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ret i32 %r
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; CHECK: lwbrx 3, 0,
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}
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!0 = metadata !{i32 101688}
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