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As requested, a blurb on sub-targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23769 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -444,7 +444,11 @@ href="TableGenFundamentals.html">TableGen</a> description of the register file.
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<div class="doc_text">
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<p>
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TODO
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<p>The <tt>TargetSubtarget</tt> class is used to provide information about the
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specific chip set being targeted. A sub-target informs code generation of
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which instructions are supported, instruction latencies and instruction
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execution itinerary; i.e., which processing units are used, in what order, and
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for how long.
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</p>
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</div>
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