TableGen SubtargetEmitter fix to allow A9 and Swift to coexist.

Allow variants to be defined only for some processors on a target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178074 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick
2013-03-26 21:36:39 +00:00
parent df23a60fa6
commit 82e7c4f533
2 changed files with 24 additions and 2 deletions
+16 -1
View File
@@ -850,7 +850,22 @@ void SubtargetEmitter::GenSchedClassTables(const CodeGenProcModel &ProcModel,
SCDesc.ReadAdvanceIdx = 0;
// A Variant SchedClass has no resources of its own.
if (!SCI->Transitions.empty()) {
bool HasVariants = false;
for (std::vector<CodeGenSchedTransition>::const_iterator
TI = SCI->Transitions.begin(), TE = SCI->Transitions.end();
TI != TE; ++TI) {
if (TI->ProcIndices[0] == 0) {
HasVariants = true;
break;
}
IdxIter PIPos = std::find(TI->ProcIndices.begin(),
TI->ProcIndices.end(), ProcModel.Index);
if (PIPos != TI->ProcIndices.end()) {
HasVariants = true;
break;
}
}
if (HasVariants) {
SCDesc.NumMicroOps = MCSchedClassDesc::VariantNumMicroOps;
continue;
}