mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 20:32:21 +00:00
Endianness does not affect the order of vector fields. This fixes
SingleSource/UnitTests/Vector/build.c git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26936 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
eb8b09f69f
commit
841c882f5d
@ -3155,7 +3155,6 @@ SDOperand SelectionDAGLegalize::ExpandBUILD_VECTOR(SDNode *Node) {
|
||||
|
||||
// Emit a store of each element to the stack slot.
|
||||
std::vector<SDOperand> Stores;
|
||||
bool isLittleEndian = TLI.isLittleEndian();
|
||||
unsigned TypeByteSize =
|
||||
MVT::getSizeInBits(Node->getOperand(0).getValueType())/8;
|
||||
unsigned VectorSize = MVT::getSizeInBits(VT)/8;
|
||||
@ -3164,11 +3163,7 @@ SDOperand SelectionDAGLegalize::ExpandBUILD_VECTOR(SDNode *Node) {
|
||||
// Ignore undef elements.
|
||||
if (Node->getOperand(i).getOpcode() == ISD::UNDEF) continue;
|
||||
|
||||
unsigned Offset;
|
||||
if (isLittleEndian)
|
||||
Offset = TypeByteSize*i;
|
||||
else
|
||||
Offset = TypeByteSize*(e-i-1);
|
||||
unsigned Offset = TypeByteSize*i;
|
||||
|
||||
SDOperand Idx = DAG.getConstant(Offset, FIPtr.getValueType());
|
||||
Idx = DAG.getNode(ISD::ADD, FIPtr.getValueType(), FIPtr, Idx);
|
||||
|
Loading…
Reference in New Issue
Block a user