mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 20:32:21 +00:00
Convert more loops to range-based equivalents
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207714 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
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fff0879df0
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846781235d
@ -36,19 +36,16 @@ void calculateDbgValueHistory(const MachineFunction *MF,
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for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E;
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++I) {
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bool AtBlockEntry = true;
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for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end();
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II != IE; ++II) {
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const MachineInstr *MI = II;
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if (MI->isDebugValue()) {
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assert(MI->getNumOperands() > 1 && "Invalid machine instruction!");
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for (const auto &MI : *I) {
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if (MI.isDebugValue()) {
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assert(MI.getNumOperands() > 1 && "Invalid machine instruction!");
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// Keep track of user variables.
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const MDNode *Var = MI->getDebugVariable();
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const MDNode *Var = MI.getDebugVariable();
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// Variable is in a register, we need to check for clobbers.
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if (isDbgValueInDefinedReg(MI))
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LiveUserVar[MI->getOperand(0).getReg()] = Var;
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if (isDbgValueInDefinedReg(&MI))
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LiveUserVar[MI.getOperand(0).getReg()] = Var;
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// Check the history of this variable.
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SmallVectorImpl<const MachineInstr *> &History = Result[Var];
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@ -84,14 +81,14 @@ void calculateDbgValueHistory(const MachineFunction *MF,
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}
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}
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}
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History.push_back(MI);
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History.push_back(&MI);
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} else {
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// Not a DBG_VALUE instruction.
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if (!MI->isPosition())
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if (!MI.isPosition())
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AtBlockEntry = false;
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// Check if the instruction clobbers any registers with debug vars.
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for (const MachineOperand &MO : MI->operands()) {
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for (const MachineOperand &MO : MI.operands()) {
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if (!MO.isReg() || !MO.isDef() || !MO.getReg())
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continue;
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for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
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@ -113,14 +110,14 @@ void calculateDbgValueHistory(const MachineFunction *MF,
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const MachineInstr *Prev = History.back();
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// Sanity-check: Register assignments are terminated at the end of
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// their block.
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if (!Prev->isDebugValue() || Prev->getParent() != MI->getParent())
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if (!Prev->isDebugValue() || Prev->getParent() != MI.getParent())
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continue;
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// Is the variable still in Reg?
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if (!isDbgValueInDefinedReg(Prev) ||
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Prev->getOperand(0).getReg() != Reg)
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continue;
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// Var is clobbered. Make sure the next instruction gets a label.
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History.push_back(MI);
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History.push_back(&MI);
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}
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}
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}
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@ -1441,23 +1441,21 @@ void DwarfDebug::beginFunction(const MachineFunction *MF) {
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// Collect user variables, find the end of the prologue.
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for (const auto &MBB : *MF) {
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for (MachineBasicBlock::const_iterator II = MBB.begin(), IE = MBB.end();
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II != IE; ++II) {
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const MachineInstr *MI = II;
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if (MI->isDebugValue()) {
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assert(MI->getNumOperands() > 1 && "Invalid machine instruction!");
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for (const auto &MI : MBB) {
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if (MI.isDebugValue()) {
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assert(MI.getNumOperands() > 1 && "Invalid machine instruction!");
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// Keep track of user variables in order of appearance. Store the set
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// of variables we've already seen as a set of keys in DbgValues.
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const MDNode *Var = MI->getDebugVariable();
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const MDNode *Var = MI.getDebugVariable();
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auto IterPair = DbgValues.insert(
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std::make_pair(Var, SmallVector<const MachineInstr *, 4>()));
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if (IterPair.second)
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UserVariables.push_back(Var);
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} else if (!MI->getFlag(MachineInstr::FrameSetup) &&
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PrologEndLoc.isUnknown() && !MI->getDebugLoc().isUnknown()) {
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} else if (!MI.getFlag(MachineInstr::FrameSetup) &&
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PrologEndLoc.isUnknown() && !MI.getDebugLoc().isUnknown()) {
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// First known non-DBG_VALUE and non-frame setup location marks
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// the beginning of the function body.
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PrologEndLoc = MI->getDebugLoc();
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PrologEndLoc = MI.getDebugLoc();
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}
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}
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}
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@ -225,16 +225,15 @@ ComputeCallSiteTable(SmallVectorImpl<CallSiteEntry> &CallSites,
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// Visit all instructions in order of address.
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for (const auto &MBB : *Asm->MF) {
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for (MachineBasicBlock::const_iterator MI = MBB.begin(), E = MBB.end();
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MI != E; ++MI) {
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if (!MI->isEHLabel()) {
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if (MI->isCall())
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SawPotentiallyThrowing |= !CallToNoUnwindFunction(MI);
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for (const auto &MI : MBB) {
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if (!MI.isEHLabel()) {
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if (MI.isCall())
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SawPotentiallyThrowing |= !CallToNoUnwindFunction(&MI);
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continue;
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}
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// End of the previous try-range?
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MCSymbol *BeginLabel = MI->getOperand(0).getMCSymbol();
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MCSymbol *BeginLabel = MI.getOperand(0).getMCSymbol();
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if (BeginLabel == LastLabel)
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SawPotentiallyThrowing = false;
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@ -277,20 +277,19 @@ void WinCodeViewLineTables::beginFunction(const MachineFunction *MF) {
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// for the first instruction of the function, not the last of the prolog?
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DebugLoc PrologEndLoc;
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bool EmptyPrologue = true;
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for (MachineFunction::const_iterator I = MF->begin(), E = MF->end();
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I != E && PrologEndLoc.isUnknown(); ++I) {
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for (MachineBasicBlock::const_iterator II = I->begin(), IE = I->end();
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II != IE; ++II) {
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const MachineInstr *MI = II;
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if (MI->isDebugValue())
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for (const auto &MBB : *MF) {
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if (!PrologEndLoc.isUnknown())
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break;
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for (const auto &MI : MBB) {
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if (MI.isDebugValue())
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continue;
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// First known non-DBG_VALUE and non-frame setup location marks
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// the beginning of the function body.
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// FIXME: do we need the first subcondition?
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if (!MI->getFlag(MachineInstr::FrameSetup) &&
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(!MI->getDebugLoc().isUnknown())) {
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PrologEndLoc = MI->getDebugLoc();
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if (!MI.getFlag(MachineInstr::FrameSetup) &&
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(!MI.getDebugLoc().isUnknown())) {
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PrologEndLoc = MI.getDebugLoc();
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break;
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}
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EmptyPrologue = false;
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@ -63,25 +63,22 @@ void LexicalScopes::extractLexicalScopes(
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const MachineInstr *RangeBeginMI = nullptr;
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const MachineInstr *PrevMI = nullptr;
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DebugLoc PrevDL;
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for (MachineBasicBlock::const_iterator II = MBB.begin(), IE = MBB.end();
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II != IE; ++II) {
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const MachineInstr *MInsn = II;
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for (const auto &MInsn : MBB) {
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// Check if instruction has valid location information.
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const DebugLoc MIDL = MInsn->getDebugLoc();
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const DebugLoc MIDL = MInsn.getDebugLoc();
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if (MIDL.isUnknown()) {
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PrevMI = MInsn;
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PrevMI = &MInsn;
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continue;
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}
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// If scope has not changed then skip this instruction.
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if (MIDL == PrevDL) {
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PrevMI = MInsn;
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PrevMI = &MInsn;
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continue;
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}
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// Ignore DBG_VALUE. It does not contribute to any instruction in output.
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if (MInsn->isDebugValue())
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if (MInsn.isDebugValue())
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continue;
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if (RangeBeginMI) {
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@ -94,10 +91,10 @@ void LexicalScopes::extractLexicalScopes(
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}
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// This is a beginning of a new instruction range.
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RangeBeginMI = MInsn;
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RangeBeginMI = &MInsn;
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// Reset previous markers.
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PrevMI = MInsn;
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PrevMI = &MInsn;
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PrevDL = MIDL;
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}
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@ -702,12 +702,14 @@ void LiveVariables::removeVirtualRegistersKilled(MachineInstr *MI) {
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///
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void LiveVariables::analyzePHINodes(const MachineFunction& Fn) {
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for (const auto &MBB : Fn)
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for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end();
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BBI != BBE && BBI->isPHI(); ++BBI)
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for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
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if (BBI->getOperand(i).readsReg())
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PHIVarInfo[BBI->getOperand(i + 1).getMBB()->getNumber()]
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.push_back(BBI->getOperand(i).getReg());
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for (const auto &BBI : MBB) {
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if (!BBI.isPHI())
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break;
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for (unsigned i = 1, e = BBI.getNumOperands(); i != e; i += 2)
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if (BBI.getOperand(i).readsReg())
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PHIVarInfo[BBI.getOperand(i + 1).getMBB()->getNumber()]
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.push_back(BBI.getOperand(i).getReg());
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}
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}
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bool LiveVariables::VarInfo::isLiveIn(const MachineBasicBlock &MBB,
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@ -97,19 +97,17 @@ MachineTraceMetrics::getResources(const MachineBasicBlock *MBB) {
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unsigned PRKinds = SchedModel.getNumProcResourceKinds();
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SmallVector<unsigned, 32> PRCycles(PRKinds);
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for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end();
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I != E; ++I) {
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const MachineInstr *MI = I;
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if (MI->isTransient())
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for (const auto &MI : *MBB) {
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if (MI.isTransient())
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continue;
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++InstrCount;
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if (MI->isCall())
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if (MI.isCall())
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FBI->HasCalls = true;
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// Count processor resources used.
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if (!SchedModel.hasInstrSchedModel())
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continue;
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const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(MI);
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const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(&MI);
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if (!SC->isValid())
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continue;
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@ -570,9 +568,8 @@ MachineTraceMetrics::Ensemble::invalidate(const MachineBasicBlock *BadMBB) {
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// invalidated, but their instructions will stay the same, so there is no
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// need to erase the Cycle entries. They will be overwritten when we
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// recompute.
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for (MachineBasicBlock::const_iterator I = BadMBB->begin(), E = BadMBB->end();
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I != E; ++I)
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Cycles.erase(I);
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for (const auto &I : *BadMBB)
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Cycles.erase(&I);
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}
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void MachineTraceMetrics::Ensemble::verify() const {
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@ -830,16 +827,13 @@ computeInstrDepths(const MachineBasicBlock *MBB) {
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if (TBI.HasValidInstrHeights)
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TBI.CriticalPath = computeCrossBlockCriticalPath(TBI);
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for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end();
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I != E; ++I) {
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const MachineInstr *UseMI = I;
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for (const auto &UseMI : *MBB) {
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// Collect all data dependencies.
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Deps.clear();
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if (UseMI->isPHI())
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getPHIDeps(UseMI, Deps, TBI.Pred, MTM.MRI);
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else if (getDataDeps(UseMI, Deps, MTM.MRI))
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updatePhysDepsDownwards(UseMI, Deps, RegUnits, MTM.TRI);
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if (UseMI.isPHI())
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getPHIDeps(&UseMI, Deps, TBI.Pred, MTM.MRI);
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else if (getDataDeps(&UseMI, Deps, MTM.MRI))
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updatePhysDepsDownwards(&UseMI, Deps, RegUnits, MTM.TRI);
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// Filter and process dependencies, computing the earliest issue cycle.
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unsigned Cycle = 0;
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@ -855,20 +849,20 @@ computeInstrDepths(const MachineBasicBlock *MBB) {
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// Add latency if DefMI is a real instruction. Transients get latency 0.
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if (!Dep.DefMI->isTransient())
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DepCycle += MTM.SchedModel
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.computeOperandLatency(Dep.DefMI, Dep.DefOp, UseMI, Dep.UseOp);
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.computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, Dep.UseOp);
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Cycle = std::max(Cycle, DepCycle);
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}
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// Remember the instruction depth.
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InstrCycles &MICycles = Cycles[UseMI];
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InstrCycles &MICycles = Cycles[&UseMI];
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MICycles.Depth = Cycle;
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if (!TBI.HasValidInstrHeights) {
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DEBUG(dbgs() << Cycle << '\t' << *UseMI);
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DEBUG(dbgs() << Cycle << '\t' << UseMI);
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continue;
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}
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// Update critical path length.
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TBI.CriticalPath = std::max(TBI.CriticalPath, Cycle + MICycles.Height);
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DEBUG(dbgs() << TBI.CriticalPath << '\t' << Cycle << '\t' << *UseMI);
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DEBUG(dbgs() << TBI.CriticalPath << '\t' << Cycle << '\t' << UseMI);
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}
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}
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}
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@ -1057,16 +1051,16 @@ computeInstrHeights(const MachineBasicBlock *MBB) {
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Succ = Loop->getHeader();
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if (Succ) {
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for (MachineBasicBlock::const_iterator I = Succ->begin(), E = Succ->end();
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I != E && I->isPHI(); ++I) {
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const MachineInstr *PHI = I;
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for (const auto &PHI : *Succ) {
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if (!PHI.isPHI())
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break;
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Deps.clear();
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getPHIDeps(PHI, Deps, MBB, MTM.MRI);
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getPHIDeps(&PHI, Deps, MBB, MTM.MRI);
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if (!Deps.empty()) {
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// Loop header PHI heights are all 0.
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unsigned Height = TBI.Succ ? Cycles.lookup(PHI).Height : 0;
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DEBUG(dbgs() << "pred\t" << Height << '\t' << *PHI);
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if (pushDepHeight(Deps.front(), PHI, Height,
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unsigned Height = TBI.Succ ? Cycles.lookup(&PHI).Height : 0;
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DEBUG(dbgs() << "pred\t" << Height << '\t' << PHI);
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if (pushDepHeight(Deps.front(), &PHI, Height,
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Heights, MTM.SchedModel, MTM.TII))
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addLiveIns(Deps.front().DefMI, Deps.front().DefOp, Stack);
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}
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@ -1224,27 +1224,28 @@ void MachineVerifier::calcRegsRequired() {
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// calcRegsPassed has been run so BBInfo::isLiveOut is valid.
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void MachineVerifier::checkPHIOps(const MachineBasicBlock *MBB) {
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SmallPtrSet<const MachineBasicBlock*, 8> seen;
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for (MachineBasicBlock::const_iterator BBI = MBB->begin(), BBE = MBB->end();
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BBI != BBE && BBI->isPHI(); ++BBI) {
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for (const auto &BBI : *MBB) {
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if (!BBI.isPHI())
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break;
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seen.clear();
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for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) {
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unsigned Reg = BBI->getOperand(i).getReg();
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const MachineBasicBlock *Pre = BBI->getOperand(i + 1).getMBB();
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for (unsigned i = 1, e = BBI.getNumOperands(); i != e; i += 2) {
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unsigned Reg = BBI.getOperand(i).getReg();
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const MachineBasicBlock *Pre = BBI.getOperand(i + 1).getMBB();
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if (!Pre->isSuccessor(MBB))
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continue;
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seen.insert(Pre);
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BBInfo &PrInfo = MBBInfoMap[Pre];
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if (PrInfo.reachable && !PrInfo.isLiveOut(Reg))
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report("PHI operand is not live-out from predecessor",
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&BBI->getOperand(i), i);
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&BBI.getOperand(i), i);
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}
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// Did we see all predecessors?
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for (MachineBasicBlock::const_pred_iterator PrI = MBB->pred_begin(),
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PrE = MBB->pred_end(); PrI != PrE; ++PrI) {
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if (!seen.count(*PrI)) {
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report("Missing PHI operand", BBI);
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report("Missing PHI operand", &BBI);
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*OS << "BB#" << (*PrI)->getNumber()
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<< " is a predecessor according to the CFG.\n";
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}
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@ -1668,32 +1669,31 @@ void MachineVerifier::verifyStackFrame() {
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}
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// Update stack state by checking contents of MBB.
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for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end();
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I != E; ++I) {
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if (I->getOpcode() == FrameSetupOpcode) {
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for (const auto &I : *MBB) {
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if (I.getOpcode() == FrameSetupOpcode) {
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// The first operand of a FrameOpcode should be i32.
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int Size = I->getOperand(0).getImm();
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int Size = I.getOperand(0).getImm();
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assert(Size >= 0 &&
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"Value should be non-negative in FrameSetup and FrameDestroy.\n");
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if (BBState.ExitIsSetup)
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report("FrameSetup is after another FrameSetup", I);
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report("FrameSetup is after another FrameSetup", &I);
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BBState.ExitValue -= Size;
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BBState.ExitIsSetup = true;
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}
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if (I->getOpcode() == FrameDestroyOpcode) {
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if (I.getOpcode() == FrameDestroyOpcode) {
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// The first operand of a FrameOpcode should be i32.
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int Size = I->getOperand(0).getImm();
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int Size = I.getOperand(0).getImm();
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assert(Size >= 0 &&
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"Value should be non-negative in FrameSetup and FrameDestroy.\n");
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if (!BBState.ExitIsSetup)
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report("FrameDestroy is not after a FrameSetup", I);
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report("FrameDestroy is not after a FrameSetup", &I);
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int AbsSPAdj = BBState.ExitValue < 0 ? -BBState.ExitValue :
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BBState.ExitValue;
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if (BBState.ExitIsSetup && AbsSPAdj != Size) {
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report("FrameDestroy <n> is after FrameSetup <m>", I);
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report("FrameDestroy <n> is after FrameSetup <m>", &I);
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*OS << "FrameDestroy <" << Size << "> is after FrameSetup <"
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<< AbsSPAdj << ">.\n";
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}
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@ -533,11 +533,13 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB,
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///
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void PHIElimination::analyzePHINodes(const MachineFunction& MF) {
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for (const auto &MBB : MF)
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for (MachineBasicBlock::const_iterator BBI = MBB.begin(), BBE = MBB.end();
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BBI != BBE && BBI->isPHI(); ++BBI)
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for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
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++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i+1).getMBB()->getNumber(),
|
||||
BBI->getOperand(i).getReg())];
|
||||
for (const auto &BBI : MBB) {
|
||||
if (!BBI.isPHI())
|
||||
break;
|
||||
for (unsigned i = 1, e = BBI.getNumOperands(); i != e; i += 2)
|
||||
++VRegPHIUseCount[BBVRegPair(BBI.getOperand(i+1).getMBB()->getNumber(),
|
||||
BBI.getOperand(i).getReg())];
|
||||
}
|
||||
}
|
||||
|
||||
bool PHIElimination::SplitPHIEdges(MachineFunction &MF,
|
||||
|
@ -321,17 +321,9 @@ PBQPRAProblem *PBQPBuilderWithCoalescing::build(MachineFunction *mf,
|
||||
|
||||
// Scan the machine function and add a coalescing cost whenever CoalescerPair
|
||||
// gives the Ok.
|
||||
for (MachineFunction::const_iterator mbbItr = mf->begin(),
|
||||
mbbEnd = mf->end();
|
||||
mbbItr != mbbEnd; ++mbbItr) {
|
||||
const MachineBasicBlock *mbb = &*mbbItr;
|
||||
|
||||
for (MachineBasicBlock::const_iterator miItr = mbb->begin(),
|
||||
miEnd = mbb->end();
|
||||
miItr != miEnd; ++miItr) {
|
||||
const MachineInstr *mi = &*miItr;
|
||||
|
||||
if (!cp.setRegisters(mi)) {
|
||||
for (const auto &mbb : *mf) {
|
||||
for (const auto &mi : mbb) {
|
||||
if (!cp.setRegisters(&mi)) {
|
||||
continue; // Not coalescable.
|
||||
}
|
||||
|
||||
@ -346,7 +338,7 @@ PBQPRAProblem *PBQPBuilderWithCoalescing::build(MachineFunction *mf,
|
||||
// value plucked randomly out of the air.
|
||||
|
||||
PBQP::PBQPNum cBenefit =
|
||||
copyFactor * LiveIntervals::getSpillWeight(false, true, mbfi, mi);
|
||||
copyFactor * LiveIntervals::getSpillWeight(false, true, mbfi, &mi);
|
||||
|
||||
if (cp.isPhys()) {
|
||||
if (!mf->getRegInfo().isAllocatable(dst)) {
|
||||
|
@ -241,9 +241,8 @@ static bool isSplitEdge(const MachineBasicBlock *MBB) {
|
||||
if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
|
||||
return false;
|
||||
|
||||
for (MachineBasicBlock::const_iterator MII = MBB->begin(), E = MBB->end();
|
||||
MII != E; ++MII) {
|
||||
if (!MII->isCopyLike() && !MII->isUnconditionalBranch())
|
||||
for (const auto &MI : *MBB) {
|
||||
if (!MI.isCopyLike() && !MI.isUnconditionalBranch())
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
|
@ -510,21 +510,17 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
|
||||
|
||||
// Determine if there are any calls in this machine function.
|
||||
MachineFrameInfo *MFI = MF->getFrameInfo();
|
||||
for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E;
|
||||
++I) {
|
||||
|
||||
for (const auto &MBB : *MF) {
|
||||
if (MFI->hasCalls() && MF->hasInlineAsm())
|
||||
break;
|
||||
|
||||
const MachineBasicBlock *MBB = I;
|
||||
for (MachineBasicBlock::const_iterator II = MBB->begin(), IE = MBB->end();
|
||||
II != IE; ++II) {
|
||||
const MCInstrDesc &MCID = TM.getInstrInfo()->get(II->getOpcode());
|
||||
for (const auto &MI : MBB) {
|
||||
const MCInstrDesc &MCID = TM.getInstrInfo()->get(MI.getOpcode());
|
||||
if ((MCID.isCall() && !MCID.isReturn()) ||
|
||||
II->isStackAligningInlineAsm()) {
|
||||
MI.isStackAligningInlineAsm()) {
|
||||
MFI->setHasCalls(true);
|
||||
}
|
||||
if (II->isInlineAsm()) {
|
||||
if (MI.isInlineAsm()) {
|
||||
MF->setHasInlineAsm(true);
|
||||
}
|
||||
}
|
||||
|
@ -364,9 +364,7 @@ static unsigned getPHISrcRegOpIdx(MachineInstr *MI, MachineBasicBlock *SrcBB) {
|
||||
// block (which is why we need to copy the information).
|
||||
static void getRegsUsedByPHIs(const MachineBasicBlock &BB,
|
||||
DenseSet<unsigned> *UsedByPhi) {
|
||||
for(MachineBasicBlock::const_iterator I = BB.begin(), E = BB.end();
|
||||
I != E; ++I) {
|
||||
const MachineInstr &MI = *I;
|
||||
for (const auto &MI : BB) {
|
||||
if (!MI.isPHI())
|
||||
break;
|
||||
for (unsigned i = 1, e = MI.getNumOperands(); i != e; i += 2) {
|
||||
|
Loading…
Reference in New Issue
Block a user