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In MipsFrameLowering::emitPrologue and emitEpilogue, call Mips::loadImmediate
to load an immediate that does not fit into 16-bit. Also, take into consideration the global base register slot on the stack when computing the stack size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158430 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -94,38 +94,6 @@ bool MipsFrameLowering::targetHandlesStackFrameRounding() const {
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return true;
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}
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// Build an instruction sequence to load an immediate that is too large to fit
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// in 16-bit and add the result to Reg.
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static void expandLargeImm(unsigned Reg, int64_t Imm, bool IsN64,
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const MipsInstrInfo &TII, MachineBasicBlock& MBB,
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MachineBasicBlock::iterator II, DebugLoc DL) {
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unsigned LUi = IsN64 ? Mips::LUi64 : Mips::LUi;
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unsigned ADDu = IsN64 ? Mips::DADDu : Mips::ADDu;
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unsigned ZEROReg = IsN64 ? Mips::ZERO_64 : Mips::ZERO;
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unsigned ATReg = IsN64 ? Mips::AT_64 : Mips::AT;
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MipsAnalyzeImmediate AnalyzeImm;
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const MipsAnalyzeImmediate::InstSeq &Seq =
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AnalyzeImm.Analyze(Imm, IsN64 ? 64 : 32, false /* LastInstrIsADDiu */);
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MipsAnalyzeImmediate::InstSeq::const_iterator Inst = Seq.begin();
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// The first instruction can be a LUi, which is different from other
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// instructions (ADDiu, ORI and SLL) in that it does not have a register
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// operand.
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if (Inst->Opc == LUi)
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BuildMI(MBB, II, DL, TII.get(LUi), ATReg)
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.addImm(SignExtend64<16>(Inst->ImmOpnd));
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else
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BuildMI(MBB, II, DL, TII.get(Inst->Opc), ATReg).addReg(ZEROReg)
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.addImm(SignExtend64<16>(Inst->ImmOpnd));
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// Build the remaining instructions in Seq.
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for (++Inst; Inst != Seq.end(); ++Inst)
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BuildMI(MBB, II, DL, TII.get(Inst->Opc), ATReg).addReg(ATReg)
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.addImm(SignExtend64<16>(Inst->ImmOpnd));
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BuildMI(MBB, II, DL, TII.get(ADDu), Reg).addReg(Reg).addReg(ATReg);
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}
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void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
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MachineBasicBlock &MBB = MF.front();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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@ -144,9 +112,8 @@ void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
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// First, compute final stack size.
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unsigned StackAlign = getStackAlignment();
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uint64_t StackSize =
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RoundUpToAlignment(MipsFI->getMaxCallFrameSize(), StackAlign) +
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RoundUpToAlignment(MFI->getStackSize(), StackAlign);
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uint64_t StackSize = MFI->getObjectOffset(MipsFI->getGlobalRegFI()) +
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StackAlign + RoundUpToAlignment(MFI->getStackSize(), StackAlign);
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// Update stack size
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MFI->setStackSize(StackSize);
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@ -162,8 +129,12 @@ void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
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if (isInt<16>(-StackSize)) // addi sp, sp, (-stacksize)
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BuildMI(MBB, MBBI, dl, TII.get(ADDiu), SP).addReg(SP).addImm(-StackSize);
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else { // Expand immediate that doesn't fit in 16-bit.
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MipsFI->setEmitNOAT();
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expandLargeImm(SP, -StackSize, STI.isABI_N64(), TII, MBB, MBBI, dl);
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unsigned ATReg = STI.isABI_N64() ? Mips::AT_64 : Mips::AT;
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MF.getInfo<MipsFunctionInfo>()->setEmitNOAT();
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Mips::loadImmediate(-StackSize, STI.isABI_N64(), TII, MBB, MBBI, dl, false,
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0);
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BuildMI(MBB, MBBI, dl, TII.get(ADDu), SP).addReg(SP).addReg(ATReg);
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}
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// emit ".cfi_def_cfa_offset StackSize"
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@ -264,8 +235,14 @@ void MipsFrameLowering::emitEpilogue(MachineFunction &MF,
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// Adjust stack.
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if (isInt<16>(StackSize)) // addi sp, sp, (-stacksize)
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BuildMI(MBB, MBBI, dl, TII.get(ADDiu), SP).addReg(SP).addImm(StackSize);
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else // Expand immediate that doesn't fit in 16-bit.
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expandLargeImm(SP, StackSize, STI.isABI_N64(), TII, MBB, MBBI, dl);
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else { // Expand immediate that doesn't fit in 16-bit.
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unsigned ATReg = STI.isABI_N64() ? Mips::AT_64 : Mips::AT;
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MF.getInfo<MipsFunctionInfo>()->setEmitNOAT();
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Mips::loadImmediate(StackSize, STI.isABI_N64(), TII, MBB, MBBI, dl, false,
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0);
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BuildMI(MBB, MBBI, dl, TII.get(ADDu), SP).addReg(SP).addReg(ATReg);
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}
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}
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void MipsFrameLowering::
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