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Add some more "get address into register" code and a more TODOs/FIXMEs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111860 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -361,10 +361,32 @@ bool ARMFastISel::ARMSelectLoad(const Instruction *I) {
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unsigned Reg;
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int Offset;
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// TODO: Think about using loadRegFromStackSlot() here when we can.
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// See if we can handle this as Reg + Offset
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if (!ARMComputeRegOffset(I, Reg, Offset))
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return false;
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// Since the offset may be too large for the load instruction
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// get the reg+offset into a register.
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// TODO: Optimize this somewhat.
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// FIXME: There is more than one register class in the world...
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unsigned ScratchReg
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= FuncInfo.MF->getRegInfo().createVirtualRegister(ARM::GPRRegisterClass);
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ARMCC::CondCodes Pred = ARMCC::AL;
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unsigned PredReg = 0;
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if (!AFI->isThumbFunction())
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emitARMRegPlusImmediate(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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ScratchReg, Reg, Offset, Pred, PredReg,
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static_cast<const ARMBaseInstrInfo&>(TII));
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else {
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assert(AFI->isThumb2Function());
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emitT2RegPlusImmediate(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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ScratchReg, Reg, Offset, Pred, PredReg,
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static_cast<const ARMBaseInstrInfo&>(TII));
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}
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unsigned ResultReg = createResultReg(ARM::GPRRegisterClass);
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
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TII.get(ARM::LDR), ResultReg)
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