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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131863 91177308-0d34-0410-b5e6-96231b3b80d8
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Chris Lattner 2011-05-22 18:28:46 +00:00
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commit 87943e3698
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10
lib/Target/README.txt
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@ -2346,3 +2346,13 @@ Note that bb1 and bb2 are the same. This doesn't happen at the IR level
because one call is passing an i32 and the other is passing an i64.
//===---------------------------------------------------------------------===//
I see this sort of pattern in 176.gcc in a few places (e.g. the start of
store_bit_field). The rem should be replaced with a multiply and subtract:
%3 = sdiv i32 %A, %B
%4 = srem i32 %A, %B
Similarly for udiv/urem.
//===---------------------------------------------------------------------===//