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https://github.com/c64scene-ar/llvm-6502.git
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minor tidying.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100725 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -5326,6 +5326,7 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) {
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// error.
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if (OpInfo.hasMatchingInput()) {
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SDISelAsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
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if (OpInfo.ConstraintVT != Input.ConstraintVT) {
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if ((OpInfo.ConstraintVT.isInteger() !=
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Input.ConstraintVT.isInteger()) ||
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@ -5539,10 +5540,9 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) {
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std::vector<SDValue> Ops;
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TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode[0],
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hasMemory, Ops, DAG);
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if (Ops.empty()) {
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if (Ops.empty())
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report_fatal_error("Invalid operand for inline asm"
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" constraint '" + OpInfo.ConstraintCode + "'!");
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}
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// Add information to the INLINEASM node to know about this input.
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unsigned ResOpType =
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@ -5574,10 +5574,9 @@ void SelectionDAGBuilder::visitInlineAsm(CallSite CS) {
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// Copy the input into the appropriate registers.
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if (OpInfo.AssignedRegs.Regs.empty() ||
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!OpInfo.AssignedRegs.areValueTypesLegal()) {
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!OpInfo.AssignedRegs.areValueTypesLegal())
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report_fatal_error("Couldn't allocate input reg for"
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" constraint '"+ OpInfo.ConstraintCode +"'!");
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}
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OpInfo.AssignedRegs.getCopyToRegs(InOperandVal, DAG, getCurDebugLoc(),
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Chain, &Flag);
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@ -1355,7 +1355,7 @@ SelectInlineAsmMemoryOperands(std::vector<SDValue> &Ops) {
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std::vector<SDValue> SelOps;
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if (SelectInlineAsmMemoryOperand(InOps[i+1], 'm', SelOps))
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report_fatal_error("Could not match memory address. Inline asm"
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" failure!");
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" failure!");
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// Add this to the output node.
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unsigned NewFlags =
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