R600: Move trivial getters into header, use initializer list

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211917 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/R600/AMDGPUSubtarget.cpp

@@ -25,25 +25,24 @@ using namespace llvm;
 #define GET_SUBTARGETINFO_CTOR
 #include "AMDGPUGenSubtargetInfo.inc"
 
-AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) :
+AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS) :
-  AMDGPUGenSubtargetInfo(TT, CPU, FS), DumpCode(false) {
+  AMDGPUGenSubtargetInfo(TT, GPU, FS),
-    InstrItins = getInstrItineraryForCPU(CPU);
+  DevName(GPU),
-
+  Is64bit(false),
-  // Default card
+  DumpCode(false),
-  StringRef GPU = CPU;
+  R600ALUInst(false),
-  Is64bit = false;
+  HasVertexCache(false),
-  HasVertexCache = false;
+  TexVTXClauseSize(0),
-  TexVTXClauseSize = 0;
+  Gen(AMDGPUSubtarget::R600),
-  Gen = AMDGPUSubtarget::R600;
+  FP64(false),
-  FP64 = false;
+  CaymanISA(false),
-  CaymanISA = false;
+  EnableIRStructurizer(true),
-  EnableIRStructurizer = true;
+  EnableIfCvt(true),
-  EnableIfCvt = true;
+  WavefrontSize(0),
-  WavefrontSize = 0;
+  CFALUBug(false),
-  CFALUBug = false;
+  LocalMemorySize(0),
-  LocalMemorySize = 0;
+  InstrItins(getInstrItineraryForCPU(GPU)) {
   ParseSubtargetFeatures(GPU, FS);
-  DevName = GPU;
 
   if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) {
     InstrInfo.reset(new R600InstrInfo(*this));
@@ -52,74 +51,16 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) :
   }
 }
 
-bool
+unsigned AMDGPUSubtarget::getStackEntrySize() const {
-AMDGPUSubtarget::is64bit() const  {
-  return Is64bit;
-}
-bool
-AMDGPUSubtarget::hasVertexCache() const {
-  return HasVertexCache;
-}
-short
-AMDGPUSubtarget::getTexVTXClauseSize() const {
-  return TexVTXClauseSize;
-}
-enum AMDGPUSubtarget::Generation
-AMDGPUSubtarget::getGeneration() const {
-  return Gen;
-}
-bool
-AMDGPUSubtarget::hasHWFP64() const {
-  return FP64;
-}
-bool
-AMDGPUSubtarget::hasCaymanISA() const {
-  return CaymanISA;
-}
-bool
-AMDGPUSubtarget::IsIRStructurizerEnabled() const {
-  return EnableIRStructurizer;
-}
-bool
-AMDGPUSubtarget::isIfCvtEnabled() const {
-  return EnableIfCvt;
-}
-unsigned
-AMDGPUSubtarget::getWavefrontSize() const {
-  return WavefrontSize;
-}
-unsigned
-AMDGPUSubtarget::getStackEntrySize() const {
   assert(getGeneration() <= NORTHERN_ISLANDS);
   switch(getWavefrontSize()) {
   case 16:
     return 8;
   case 32:
-    if (hasCaymanISA())
+    return hasCaymanISA() ? 4 : 8;
-      return 4;
-    else
-      return 8;
   case 64:
     return 4;
   default:
     llvm_unreachable("Illegal wavefront size.");
   }
 }
-bool
-AMDGPUSubtarget::hasCFAluBug() const {
-  assert(getGeneration() <= NORTHERN_ISLANDS);
-  return CFALUBug;
-}
-int
-AMDGPUSubtarget::getLocalMemorySize() const {
-  return LocalMemorySize;
-}
-bool
-AMDGPUSubtarget::isTargetELF() const {
-  return false;
-}
-
-std::string
-AMDGPUSubtarget::getDeviceName() const {
-  return DevName;
-}

lib/Target/R600/AMDGPUSubtarget.h

@@ -48,7 +48,7 @@ private:
   bool R600ALUInst;
   bool HasVertexCache;
   short TexVTXClauseSize;
-  enum Generation Gen;
+  Generation Gen;
   bool FP64;
   bool CaymanISA;
   bool EnableIRStructurizer;
@@ -65,15 +65,36 @@ public:
   const AMDGPUInstrInfo *getInstrInfo() const {
     return InstrInfo.get();
   }
-  const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
+
+  const InstrItineraryData &getInstrItineraryData() const {
+    return InstrItins;
+  }
+
   void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
 
-  bool is64bit() const;
+  bool is64bit() const {
-  bool hasVertexCache() const;
+    return Is64bit;
-  short getTexVTXClauseSize() const;
+  }
-  enum Generation getGeneration() const;
+
-  bool hasHWFP64() const;
+  bool hasVertexCache() const {
-  bool hasCaymanISA() const;
+    return HasVertexCache;
+  }
+
+  short getTexVTXClauseSize() const {
+      return TexVTXClauseSize;
+  }
+
+  Generation getGeneration() const {
+    return Gen;
+  }
+
+  bool hasHWFP64() const {
+    return FP64;
+  }
+
+  bool hasCaymanISA() const {
+    return CaymanISA;
+  }
 
   bool hasBFE() const {
     return (getGeneration() >= EVERGREEN);
@@ -104,23 +125,48 @@ public:
             hasCaymanISA());
   }
 
-  bool IsIRStructurizerEnabled() const;
+  bool IsIRStructurizerEnabled() const {
-  bool isIfCvtEnabled() const;
+    return EnableIRStructurizer;
-  unsigned getWavefrontSize() const;
+  }
+
+  bool isIfCvtEnabled() const {
+    return EnableIfCvt;
+  }
+
+  unsigned getWavefrontSize() const {
+    return WavefrontSize;
+  }
+
   unsigned getStackEntrySize() const;
-  bool hasCFAluBug() const;
+
-  int getLocalMemorySize() const;
+  bool hasCFAluBug() const {
+    assert(getGeneration() <= NORTHERN_ISLANDS);
+    return CFALUBug;
+  }
+
+  int getLocalMemorySize() const {
+    return LocalMemorySize;
+  }
 
   bool enableMachineScheduler() const override {
     return getGeneration() <= NORTHERN_ISLANDS;
   }
 
   // Helper functions to simplify if statements
-  bool isTargetELF() const;
+  bool isTargetELF() const {
-  std::string getDeviceName() const;
+    return false;
-  bool dumpCode() const { return DumpCode; }
+  }
-  bool r600ALUEncoding() const { return R600ALUInst; }
 
+  StringRef getDeviceName() const {
+    return DevName;
+  }
+
+  bool dumpCode() const {
+    return DumpCode;
+  }
+  bool r600ALUEncoding() const {
+    return R600ALUInst;
+  }
 };
 
 } // End namespace llvm