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Add new shorter predicates for testing machine operands for various types:

Browse Source 
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45464 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2007-12-30 23:10:15 +00:00
parent 78d34664e7
commit 8aa797aa51
40 changed files with 185 additions and 192 deletions
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lib/Target/Alpha/AlphaInstrInfo.cpp
+7 -7
View File
@@ -58,7 +58,7 @@ AlphaInstrInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const {
case Alpha::LDS:
case Alpha::LDT:
if (MI->getOperand(1).isFrameIndex()) {
FrameIndex = MI->getOperand(1).getFrameIndex();
FrameIndex = MI->getOperand(1).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -76,7 +76,7 @@ AlphaInstrInfo::isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const {
case Alpha::STS:
case Alpha::STT:
if (MI->getOperand(1).isFrameIndex()) {
FrameIndex = MI->getOperand(1).getFrameIndex();
FrameIndex = MI->getOperand(1).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -168,12 +168,12 @@ bool AlphaInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TB
// If there is only one terminator instruction, process it.
if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) {
if (LastInst->getOpcode() == Alpha::BR) {
TBB = LastInst->getOperand(0).getMachineBasicBlock();
TBB = LastInst->getOperand(0).getMBB();
return false;
} else if (LastInst->getOpcode() == Alpha::COND_BRANCH_I ||
LastInst->getOpcode() == Alpha::COND_BRANCH_F) {
// Block ends with fall-through condbranch.
TBB = LastInst->getOperand(2).getMachineBasicBlock();
TBB = LastInst->getOperand(2).getMBB();
Cond.push_back(LastInst->getOperand(0));
Cond.push_back(LastInst->getOperand(1));
return false;
@@ -194,10 +194,10 @@ bool AlphaInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TB
if ((SecondLastInst->getOpcode() == Alpha::COND_BRANCH_I ||
SecondLastInst->getOpcode() == Alpha::COND_BRANCH_F) &&
LastInst->getOpcode() == Alpha::BR) {
TBB = SecondLastInst->getOperand(2).getMachineBasicBlock();
TBB = SecondLastInst->getOperand(2).getMBB();
Cond.push_back(SecondLastInst->getOperand(0));
Cond.push_back(SecondLastInst->getOperand(1));
FBB = LastInst->getOperand(0).getMachineBasicBlock();
FBB = LastInst->getOperand(0).getMBB();
return false;
}
@@ -205,7 +205,7 @@ bool AlphaInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TB
// executed, so remove it.
if (SecondLastInst->getOpcode() == Alpha::BR &&
LastInst->getOpcode() == Alpha::BR) {
TBB = SecondLastInst->getOperand(0).getMachineBasicBlock();
TBB = SecondLastInst->getOperand(0).getMBB();
I = LastInst;
I->eraseFromParent();
return false;