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ARM: Better disassembly for pc-relative LDR.
When the operand is a plain immediate rather than a label, print it as [pc, #imm] like we do for the Thumb2 wide encoding variant. rdar://12154503 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166991 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -223,6 +223,7 @@ def t_addrmode_sp : Operand<i32>,
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def t_addrmode_pc : Operand<i32> {
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def t_addrmode_pc : Operand<i32> {
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let EncoderMethod = "getAddrModePCOpValue";
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let EncoderMethod = "getAddrModePCOpValue";
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let DecoderMethod = "DecodeThumbAddrModePC";
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let DecoderMethod = "DecodeThumbAddrModePC";
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let PrintMethod = "printThumbLdrLabelOperand";
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}
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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@ -159,7 +159,7 @@ def t2addrmode_imm12 : Operand<i32>,
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// t2ldrlabel := imm12
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// t2ldrlabel := imm12
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def t2ldrlabel : Operand<i32> {
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def t2ldrlabel : Operand<i32> {
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let EncoderMethod = "getAddrModeImm12OpValue";
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let EncoderMethod = "getAddrModeImm12OpValue";
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let PrintMethod = "printT2LdrLabelOperand";
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let PrintMethod = "printThumbLdrLabelOperand";
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}
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}
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def t2ldr_pcrel_imm12_asmoperand : AsmOperandClass {let Name = "MemPCRelImm12";}
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def t2ldr_pcrel_imm12_asmoperand : AsmOperandClass {let Name = "MemPCRelImm12";}
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@ -283,8 +283,8 @@ void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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}
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}
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}
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}
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void ARMInstPrinter::printT2LdrLabelOperand(const MCInst *MI, unsigned OpNum,
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void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum,
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raw_ostream &O) {
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raw_ostream &O) {
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const MCOperand &MO1 = MI->getOperand(OpNum);
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const MCOperand &MO1 = MI->getOperand(OpNum);
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if (MO1.isExpr())
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if (MO1.isExpr())
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O << *MO1.getExpr();
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O << *MO1.getExpr();
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@ -126,7 +126,8 @@ public:
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void printRotImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printRotImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printPCLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printPCLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printT2LdrLabelOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum,
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raw_ostream &O);
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void printFBits16(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printFBits16(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printFBits32(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printFBits32(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printVectorIndex(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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void printVectorIndex(const MCInst *MI, unsigned OpNum, raw_ostream &O);
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@ -259,8 +259,8 @@ _func:
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@ CHECK: ldr r1, _foo @ encoding: [A,0x49]
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@ CHECK: ldr r1, _foo @ encoding: [A,0x49]
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@ fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp
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@ fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp
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@ CHECK: ldr r3, #604 @ encoding: [0x97,0x4b]
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@ CHECK: ldr r3, [pc, #604] @ encoding: [0x97,0x4b]
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@ CHECK: ldr r3, #368 @ encoding: [0x5c,0x4b]
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@ CHECK: ldr r3, [pc, #368] @ encoding: [0x5c,0x4b]
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@------------------------------------------------------------------------------
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@------------------------------------------------------------------------------
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@ LDR (register)
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@ LDR (register)
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@ -1,5 +1,5 @@
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# RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -mdis < %s | FileCheck %s
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# RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -mdis < %s | FileCheck %s
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# CHECK: ldr <reg:r4>, <imm:#32>
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# CHECK: ldr <reg:r4>, <mem:[pc, <imm:#32>]>
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0x08 0x4c
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0x08 0x4c
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# CHECK: push {<reg:r1>, <reg:r2>, <reg:r7>}
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# CHECK: push {<reg:r1>, <reg:r2>, <reg:r7>}
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0x86 0xb4
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0x86 0xb4
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@ -7,17 +7,17 @@
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# CHECK-NEXT: add r3, sp, #20
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# CHECK-NEXT: add r3, sp, #20
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# CHECK-NEXT: ldr r5, [r3], #4
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# CHECK-NEXT: ldr r5, [r3], #4
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# CHECK-NEXT: str r3, [sp]
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# CHECK-NEXT: str r3, [sp]
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# CHECK-NEXT: ldr r3, #52
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# CHECK-NEXT: ldr r3, [pc, #52]
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# CHECK-NEXT: add r3, pc
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# CHECK-NEXT: add r3, pc
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# CHECK-NEXT: ldr r0, [r3]
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# CHECK-NEXT: ldr r0, [r3]
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# CHECK-NEXT: ldr r4, [r0]
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# CHECK-NEXT: ldr r4, [r0]
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# CHECK-NEXT: ldr r0, #48
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# CHECK-NEXT: ldr r0, [pc, #48]
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# CHECK-NEXT: add r0, pc
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# CHECK-NEXT: add r0, pc
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# CHECK-NEXT: ldr r0, [r0]
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# CHECK-NEXT: ldr r0, [r0]
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# CHECK-NEXT: ldr r0, [r0]
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# CHECK-NEXT: ldr r0, [r0]
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# CHECK-NEXT: blx #191548
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# CHECK-NEXT: blx #191548
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# CHECK-NEXT: cbnz r0, #6
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# CHECK-NEXT: cbnz r0, #6
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# CHECK-NEXT: ldr r1, #40
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# CHECK-NEXT: ldr r1, [pc, #40]
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# CHECK-NEXT: add r1, pc
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# CHECK-NEXT: add r1, pc
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# CHECK-NEXT: ldr r1, [r1]
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# CHECK-NEXT: ldr r1, [r1]
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# CHECK-NEXT: b #0
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# CHECK-NEXT: b #0
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@ -30,7 +30,7 @@
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# CHECK: ldm r0!, {r1}
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# CHECK: ldm r0!, {r1}
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0x02 0xc8
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0x02 0xc8
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# CHECK: ldr r5, #432
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# CHECK: ldr r5, [pc, #432]
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0x6c 0x4d
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0x6c 0x4d
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# CHECK: str r0, [r3]
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# CHECK: str r0, [r3]
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@ -160,6 +160,7 @@
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# CHECK: ldr r1, [sp]
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# CHECK: ldr r1, [sp]
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# CHECK: ldr r2, [sp, #24]
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# CHECK: ldr r2, [sp, #24]
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# CHECK: ldr r3, [sp, #1020]
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# CHECK: ldr r3, [sp, #1020]
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# CHECK: ldr r1, [pc, #12]
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0x29 0x68
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0x29 0x68
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@ -168,6 +169,7 @@
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0x00 0x99
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0x00 0x99
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0x06 0x9a
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0x06 0x9a
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0xff 0x9b
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0xff 0x9b
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0x03 0x49
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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# LDR (register)
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# LDR (register)
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