Update some internal naming conventions to modern style.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155142 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2012-04-19 17:52:32 +00:00
parent 0d5fcae6cd
commit 8caecdea56

View File

@ -419,13 +419,13 @@ struct MatchableInfo {
AsmString(Alias->AsmString) {
}
void Initialize(const AsmMatcherInfo &Info,
void initialize(const AsmMatcherInfo &Info,
SmallPtrSet<Record*, 16> &SingletonRegisters,
int AsmVariantNo, std::string &RegisterPrefix);
/// Validate - Return true if this matchable is a valid thing to match against
/// validate - Return true if this matchable is a valid thing to match against
/// and perform a bunch of validity checking.
bool Validate(StringRef CommentDelimiter, bool Hack) const;
bool validate(StringRef CommentDelimiter, bool Hack) const;
/// extractSingletonRegisterForAsmOperand - Extract singleton register,
/// if present, from specified token.
@ -433,9 +433,9 @@ struct MatchableInfo {
extractSingletonRegisterForAsmOperand(unsigned i, const AsmMatcherInfo &Info,
std::string &RegisterPrefix);
/// FindAsmOperand - Find the AsmOperand with the specified name and
/// findAsmOperand - Find the AsmOperand with the specified name and
/// suboperand index.
int FindAsmOperand(StringRef N, int SubOpIdx) const {
int findAsmOperand(StringRef N, int SubOpIdx) const {
for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
if (N == AsmOperands[i].SrcOpName &&
SubOpIdx == AsmOperands[i].SubOpIdx)
@ -443,17 +443,17 @@ struct MatchableInfo {
return -1;
}
/// FindAsmOperandNamed - Find the first AsmOperand with the specified name.
/// findAsmOperandNamed - Find the first AsmOperand with the specified name.
/// This does not check the suboperand index.
int FindAsmOperandNamed(StringRef N) const {
int findAsmOperandNamed(StringRef N) const {
for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
if (N == AsmOperands[i].SrcOpName)
return i;
return -1;
}
void BuildInstructionResultOperands();
void BuildAliasResultOperands();
void buildInstructionResultOperands();
void buildAliasResultOperands();
/// operator< - Compare two matchables.
bool operator<(const MatchableInfo &RHS) const {
@ -465,7 +465,7 @@ struct MatchableInfo {
return AsmOperands.size() < RHS.AsmOperands.size();
// Compare lexicographically by operand. The matcher validates that other
// orderings wouldn't be ambiguous using \see CouldMatchAmbiguouslyWith().
// orderings wouldn't be ambiguous using \see couldMatchAmbiguouslyWith().
for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
return true;
@ -476,10 +476,10 @@ struct MatchableInfo {
return false;
}
/// CouldMatchAmbiguouslyWith - Check whether this matchable could
/// couldMatchAmbiguouslyWith - Check whether this matchable could
/// ambiguously match the same set of operands as \arg RHS (without being a
/// strictly superior match).
bool CouldMatchAmbiguouslyWith(const MatchableInfo &RHS) {
bool couldMatchAmbiguouslyWith(const MatchableInfo &RHS) {
// The primary comparator is the instruction mnemonic.
if (Mnemonic != RHS.Mnemonic)
return false;
@ -518,7 +518,7 @@ struct MatchableInfo {
void dump();
private:
void TokenizeAsmString(const AsmMatcherInfo &Info);
void tokenizeAsmString(const AsmMatcherInfo &Info);
};
/// SubtargetFeatureInfo - Helper class for storing information on a subtarget
@ -543,7 +543,7 @@ struct OperandMatchEntry {
MatchableInfo* MI;
ClassInfo *CI;
static OperandMatchEntry Create(MatchableInfo* mi, ClassInfo *ci,
static OperandMatchEntry create(MatchableInfo* mi, ClassInfo *ci,
unsigned opMask) {
OperandMatchEntry X;
X.OperandMask = opMask;
@ -599,17 +599,17 @@ private:
int SubOpIdx);
ClassInfo *getOperandClass(Record *Rec, int SubOpIdx);
/// BuildRegisterClasses - Build the ClassInfo* instances for register
/// buildRegisterClasses - Build the ClassInfo* instances for register
/// classes.
void BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters);
void buildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters);
/// BuildOperandClasses - Build the ClassInfo* instances for user defined
/// buildOperandClasses - Build the ClassInfo* instances for user defined
/// operand classes.
void BuildOperandClasses();
void buildOperandClasses();
void BuildInstructionOperandReference(MatchableInfo *II, StringRef OpName,
void buildInstructionOperandReference(MatchableInfo *II, StringRef OpName,
unsigned AsmOpIdx);
void BuildAliasOperandReference(MatchableInfo *II, StringRef OpName,
void buildAliasOperandReference(MatchableInfo *II, StringRef OpName,
MatchableInfo::AsmOperand &Op);
public:
@ -617,12 +617,12 @@ public:
CodeGenTarget &Target,
RecordKeeper &Records);
/// BuildInfo - Construct the various tables used during matching.
void BuildInfo();
/// buildInfo - Construct the various tables used during matching.
void buildInfo();
/// BuildOperandMatchInfo - Build the necessary information to handle user
/// buildOperandMatchInfo - Build the necessary information to handle user
/// defined operand parsing methods.
void BuildOperandMatchInfo();
void buildOperandMatchInfo();
/// getSubtargetFeature - Lookup or create the subtarget feature info for the
/// given operand.
@ -650,14 +650,14 @@ void MatchableInfo::dump() {
}
}
void MatchableInfo::Initialize(const AsmMatcherInfo &Info,
void MatchableInfo::initialize(const AsmMatcherInfo &Info,
SmallPtrSet<Record*, 16> &SingletonRegisters,
int AsmVariantNo, std::string &RegisterPrefix) {
AsmVariantID = AsmVariantNo;
AsmString =
CodeGenInstruction::FlattenAsmStringVariants(AsmString, AsmVariantNo);
TokenizeAsmString(Info);
tokenizeAsmString(Info);
// Compute the require features.
std::vector<Record*> Predicates =TheDef->getValueAsListOfDefs("Predicates");
@ -674,8 +674,8 @@ void MatchableInfo::Initialize(const AsmMatcherInfo &Info,
}
}
/// TokenizeAsmString - Tokenize a simplified assembly string.
void MatchableInfo::TokenizeAsmString(const AsmMatcherInfo &Info) {
/// tokenizeAsmString - Tokenize a simplified assembly string.
void MatchableInfo::tokenizeAsmString(const AsmMatcherInfo &Info) {
StringRef String = AsmString;
unsigned Prev = 0;
bool InTok = true;
@ -758,7 +758,7 @@ void MatchableInfo::TokenizeAsmString(const AsmMatcherInfo &Info) {
AsmOperands.erase(AsmOperands.begin());
}
bool MatchableInfo::Validate(StringRef CommentDelimiter, bool Hack) const {
bool MatchableInfo::validate(StringRef CommentDelimiter, bool Hack) const {
// Reject matchables with no .s string.
if (AsmString.empty())
throw TGError(TheDef->getLoc(), "instruction with empty asm string");
@ -929,7 +929,7 @@ AsmMatcherInfo::getOperandClass(Record *Rec, int SubOpIdx) {
}
void AsmMatcherInfo::
BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters) {
buildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters) {
const std::vector<CodeGenRegister*> &Registers =
Target.getRegBank().getRegisters();
ArrayRef<CodeGenRegisterClass*> RegClassList =
@ -1054,7 +1054,7 @@ BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters) {
}
}
void AsmMatcherInfo::BuildOperandClasses() {
void AsmMatcherInfo::buildOperandClasses() {
std::vector<Record*> AsmOperands =
Records.getAllDerivedDefinitions("AsmOperandClass");
@ -1123,9 +1123,9 @@ AsmMatcherInfo::AsmMatcherInfo(Record *asmParser,
: Records(records), AsmParser(asmParser), Target(target) {
}
/// BuildOperandMatchInfo - Build the necessary information to handle user
/// buildOperandMatchInfo - Build the necessary information to handle user
/// defined operand parsing methods.
void AsmMatcherInfo::BuildOperandMatchInfo() {
void AsmMatcherInfo::buildOperandMatchInfo() {
/// Map containing a mask with all operands indices that can be found for
/// that class inside a instruction.
@ -1152,12 +1152,12 @@ void AsmMatcherInfo::BuildOperandMatchInfo() {
iie = OpClassMask.end(); iit != iie; ++iit) {
unsigned OpMask = iit->second;
ClassInfo *CI = iit->first;
OperandMatchInfo.push_back(OperandMatchEntry::Create(&II, CI, OpMask));
OperandMatchInfo.push_back(OperandMatchEntry::create(&II, CI, OpMask));
}
}
}
void AsmMatcherInfo::BuildInfo() {
void AsmMatcherInfo::buildInfo() {
// Build information about all of the AssemblerPredicates.
std::vector<Record*> AllPredicates =
Records.getAllDerivedDefinitions("Predicate");
@ -1222,11 +1222,11 @@ void AsmMatcherInfo::BuildInfo() {
OwningPtr<MatchableInfo> II(new MatchableInfo(CGI));
II->Initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix);
II->initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix);
// Ignore instructions which shouldn't be matched and diagnose invalid
// instruction definitions with an error.
if (!II->Validate(CommentDelimiter, true))
if (!II->validate(CommentDelimiter, true))
continue;
// Ignore "Int_*" and "*_Int" instructions, which are internal aliases.
@ -1255,20 +1255,20 @@ void AsmMatcherInfo::BuildInfo() {
OwningPtr<MatchableInfo> II(new MatchableInfo(Alias));
II->Initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix);
II->initialize(*this, SingletonRegisters, AsmVariantNo, RegisterPrefix);
// Validate the alias definitions.
II->Validate(CommentDelimiter, false);
II->validate(CommentDelimiter, false);
Matchables.push_back(II.take());
}
}
// Build info for the register classes.
BuildRegisterClasses(SingletonRegisters);
buildRegisterClasses(SingletonRegisters);
// Build info for the user defined assembly operand classes.
BuildOperandClasses();
buildOperandClasses();
// Build the information about matchables, now that we have fully formed
// classes.
@ -1277,7 +1277,7 @@ void AsmMatcherInfo::BuildInfo() {
MatchableInfo *II = *it;
// Parse the tokens after the mnemonic.
// Note: BuildInstructionOperandReference may insert new AsmOperands, so
// Note: buildInstructionOperandReference may insert new AsmOperands, so
// don't precompute the loop bound.
for (unsigned i = 0; i != II->AsmOperands.size(); ++i) {
MatchableInfo::AsmOperand &Op = II->AsmOperands[i];
@ -1310,15 +1310,15 @@ void AsmMatcherInfo::BuildInfo() {
OperandName = Token.substr(1);
if (II->DefRec.is<const CodeGenInstruction*>())
BuildInstructionOperandReference(II, OperandName, i);
buildInstructionOperandReference(II, OperandName, i);
else
BuildAliasOperandReference(II, OperandName, Op);
buildAliasOperandReference(II, OperandName, Op);
}
if (II->DefRec.is<const CodeGenInstruction*>())
II->BuildInstructionResultOperands();
II->buildInstructionResultOperands();
else
II->BuildAliasResultOperands();
II->buildAliasResultOperands();
}
// Process token alias definitions and set up the associated superclass
@ -1339,10 +1339,10 @@ void AsmMatcherInfo::BuildInfo() {
std::sort(Classes.begin(), Classes.end(), less_ptr<ClassInfo>());
}
/// BuildInstructionOperandReference - The specified operand is a reference to a
/// buildInstructionOperandReference - The specified operand is a reference to a
/// named operand such as $src. Resolve the Class and OperandInfo pointers.
void AsmMatcherInfo::
BuildInstructionOperandReference(MatchableInfo *II,
buildInstructionOperandReference(MatchableInfo *II,
StringRef OperandName,
unsigned AsmOpIdx) {
const CodeGenInstruction &CGI = *II->DefRec.get<const CodeGenInstruction*>();
@ -1399,10 +1399,10 @@ BuildInstructionOperandReference(MatchableInfo *II,
Op->SrcOpName = OperandName;
}
/// BuildAliasOperandReference - When parsing an operand reference out of the
/// buildAliasOperandReference - When parsing an operand reference out of the
/// matching string (e.g. "movsx $src, $dst"), determine what the class of the
/// operand reference is by looking it up in the result pattern definition.
void AsmMatcherInfo::BuildAliasOperandReference(MatchableInfo *II,
void AsmMatcherInfo::buildAliasOperandReference(MatchableInfo *II,
StringRef OperandName,
MatchableInfo::AsmOperand &Op) {
const CodeGenInstAlias &CGA = *II->DefRec.get<const CodeGenInstAlias*>();
@ -1427,7 +1427,7 @@ void AsmMatcherInfo::BuildAliasOperandReference(MatchableInfo *II,
OperandName.str() + "'");
}
void MatchableInfo::BuildInstructionResultOperands() {
void MatchableInfo::buildInstructionResultOperands() {
const CodeGenInstruction *ResultInst = getResultInst();
// Loop over all operands of the result instruction, determining how to
@ -1443,7 +1443,7 @@ void MatchableInfo::BuildInstructionResultOperands() {
}
// Find out what operand from the asmparser this MCInst operand comes from.
int SrcOperand = FindAsmOperandNamed(OpInfo.Name);
int SrcOperand = findAsmOperandNamed(OpInfo.Name);
if (OpInfo.Name.empty() || SrcOperand == -1)
throw TGError(TheDef->getLoc(), "Instruction '" +
TheDef->getName() + "' has operand '" + OpInfo.Name +
@ -1466,7 +1466,7 @@ void MatchableInfo::BuildInstructionResultOperands() {
}
}
void MatchableInfo::BuildAliasResultOperands() {
void MatchableInfo::buildAliasResultOperands() {
const CodeGenInstAlias &CGA = *DefRec.get<const CodeGenInstAlias*>();
const CodeGenInstruction *ResultInst = getResultInst();
@ -1495,7 +1495,7 @@ void MatchableInfo::BuildAliasResultOperands() {
switch (CGA.ResultOperands[AliasOpNo].Kind) {
case CodeGenInstAlias::ResultOperand::K_Record: {
StringRef Name = CGA.ResultOperands[AliasOpNo].getName();
int SrcOperand = FindAsmOperand(Name, SubIdx);
int SrcOperand = findAsmOperand(Name, SubIdx);
if (SrcOperand == -1)
throw TGError(TheDef->getLoc(), "Instruction '" +
TheDef->getName() + "' has operand '" + OpName +
@ -1520,7 +1520,7 @@ void MatchableInfo::BuildAliasResultOperands() {
}
}
static void EmitConvertToMCInst(CodeGenTarget &Target, StringRef ClassName,
static void emitConvertToMCInst(CodeGenTarget &Target, StringRef ClassName,
std::vector<MatchableInfo*> &Infos,
raw_ostream &OS) {
// Write the convert function to a separate stream, so we can drop it after
@ -1661,8 +1661,8 @@ static void EmitConvertToMCInst(CodeGenTarget &Target, StringRef ClassName,
OS << CvtOS.str();
}
/// EmitMatchClassEnumeration - Emit the enumeration for match class kinds.
static void EmitMatchClassEnumeration(CodeGenTarget &Target,
/// emitMatchClassEnumeration - Emit the enumeration for match class kinds.
static void emitMatchClassEnumeration(CodeGenTarget &Target,
std::vector<ClassInfo*> &Infos,
raw_ostream &OS) {
OS << "namespace {\n\n";
@ -1692,8 +1692,8 @@ static void EmitMatchClassEnumeration(CodeGenTarget &Target,
OS << "}\n\n";
}
/// EmitValidateOperandClass - Emit the function to validate an operand class.
static void EmitValidateOperandClass(AsmMatcherInfo &Info,
/// emitValidateOperandClass - Emit the function to validate an operand class.
static void emitValidateOperandClass(AsmMatcherInfo &Info,
raw_ostream &OS) {
OS << "static bool validateOperandClass(MCParsedAsmOperand *GOp, "
<< "MatchClassKind Kind) {\n";
@ -1744,8 +1744,8 @@ static void EmitValidateOperandClass(AsmMatcherInfo &Info,
OS << "}\n\n";
}
/// EmitIsSubclass - Emit the subclass predicate function.
static void EmitIsSubclass(CodeGenTarget &Target,
/// emitIsSubclass - Emit the subclass predicate function.
static void emitIsSubclass(CodeGenTarget &Target,
std::vector<ClassInfo*> &Infos,
raw_ostream &OS) {
OS << "/// isSubclass - Compute whether \\arg A is a subclass of \\arg B.\n";
@ -1789,9 +1789,9 @@ static void EmitIsSubclass(CodeGenTarget &Target,
OS << "}\n\n";
}
/// EmitMatchTokenString - Emit the function to match a token string to the
/// emitMatchTokenString - Emit the function to match a token string to the
/// appropriate match class value.
static void EmitMatchTokenString(CodeGenTarget &Target,
static void emitMatchTokenString(CodeGenTarget &Target,
std::vector<ClassInfo*> &Infos,
raw_ostream &OS) {
// Construct the match list.
@ -1813,9 +1813,9 @@ static void EmitMatchTokenString(CodeGenTarget &Target,
OS << "}\n\n";
}
/// EmitMatchRegisterName - Emit the function to match a string to the target
/// emitMatchRegisterName - Emit the function to match a string to the target
/// specific register enum.
static void EmitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
static void emitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
raw_ostream &OS) {
// Construct the match list.
std::vector<StringMatcher::StringPair> Matches;
@ -1839,9 +1839,9 @@ static void EmitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
OS << "}\n\n";
}
/// EmitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
/// emitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
/// definitions.
static void EmitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info,
static void emitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info,
raw_ostream &OS) {
OS << "// Flags for subtarget features that participate in "
<< "instruction matching.\n";
@ -1856,9 +1856,9 @@ static void EmitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info,
OS << "};\n\n";
}
/// EmitComputeAvailableFeatures - Emit the function to compute the list of
/// emitComputeAvailableFeatures - Emit the function to compute the list of
/// available features given a subtarget.
static void EmitComputeAvailableFeatures(AsmMatcherInfo &Info,
static void emitComputeAvailableFeatures(AsmMatcherInfo &Info,
raw_ostream &OS) {
std::string ClassName =
Info.AsmParser->getValueAsString("AsmParserClassName");
@ -1933,9 +1933,9 @@ static std::string GetAliasRequiredFeatures(Record *R,
return Result;
}
/// EmitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
/// emitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
/// emit a function for them and return true, otherwise return false.
static bool EmitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
static bool emitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
// Ignore aliases when match-prefix is set.
if (!MatchPrefix.empty())
return false;
@ -2023,7 +2023,7 @@ static const char *getMinimalTypeForRange(uint64_t Range) {
return "uint8_t";
}
static void EmitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
static void emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
const AsmMatcherInfo &Info, StringRef ClassName) {
// Emit the static custom operand parsing table;
OS << "namespace {\n";
@ -2193,7 +2193,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
// Compute the information on the instructions to match.
AsmMatcherInfo Info(AsmParser, Target, Records);
Info.BuildInfo();
Info.buildInfo();
// Sort the instruction table using the partial order on classes. We use
// stable_sort to ensure that ambiguous instructions are still
@ -2216,7 +2216,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
MatchableInfo &A = *Info.Matchables[i];
MatchableInfo &B = *Info.Matchables[j];
if (A.CouldMatchAmbiguouslyWith(B)) {
if (A.couldMatchAmbiguouslyWith(B)) {
errs() << "warning: ambiguous matchables:\n";
A.dump();
errs() << "\nis incomparable with:\n";
@ -2232,7 +2232,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
});
// Compute the information on the custom operand parsing.
Info.BuildOperandMatchInfo();
Info.buildOperandMatchInfo();
// Write the output.
@ -2274,10 +2274,10 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
OS << "#undef GET_REGISTER_MATCHER\n\n";
// Emit the subtarget feature enumeration.
EmitSubtargetFeatureFlagEnumeration(Info, OS);
emitSubtargetFeatureFlagEnumeration(Info, OS);
// Emit the function to match a register name to number.
EmitMatchRegisterName(Target, AsmParser, OS);
emitMatchRegisterName(Target, AsmParser, OS);
OS << "#endif // GET_REGISTER_MATCHER\n\n";
@ -2286,25 +2286,25 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n";
// Generate the function that remaps for mnemonic aliases.
bool HasMnemonicAliases = EmitMnemonicAliases(OS, Info);
bool HasMnemonicAliases = emitMnemonicAliases(OS, Info);
// Generate the unified function to convert operands into an MCInst.
EmitConvertToMCInst(Target, ClassName, Info.Matchables, OS);
emitConvertToMCInst(Target, ClassName, Info.Matchables, OS);
// Emit the enumeration for classes which participate in matching.
EmitMatchClassEnumeration(Target, Info.Classes, OS);
emitMatchClassEnumeration(Target, Info.Classes, OS);
// Emit the routine to match token strings to their match class.
EmitMatchTokenString(Target, Info.Classes, OS);
emitMatchTokenString(Target, Info.Classes, OS);
// Emit the subclass predicate routine.
EmitIsSubclass(Target, Info.Classes, OS);
emitIsSubclass(Target, Info.Classes, OS);
// Emit the routine to validate an operand against a match class.
EmitValidateOperandClass(Info, OS);
emitValidateOperandClass(Info, OS);
// Emit the available features compute function.
EmitComputeAvailableFeatures(Info, OS);
emitComputeAvailableFeatures(Info, OS);
size_t MaxNumOperands = 0;
@ -2529,7 +2529,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
OS << "}\n\n";
if (Info.OperandMatchInfo.size())
EmitCustomOperandParsing(OS, Target, Info, ClassName);
emitCustomOperandParsing(OS, Target, Info, ClassName);
OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n";
}