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Clear kill flags in InstrEmitter::EmitSubregNode().
When a local virtual register is made global, make sure to clear any existing kill flags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159461 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -470,6 +470,7 @@ void InstrEmitter::EmitSubregNode(SDNode *Node,
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VRBase = MRI->createVirtualRegister(TRC);
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BuildMI(*MBB, InsertPos, Node->getDebugLoc(),
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TII->get(TargetOpcode::COPY), VRBase).addReg(SrcReg);
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MRI->clearKillFlags(SrcReg);
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} else {
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// VReg may not support a SubIdx sub-register, and we may need to
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// constrain its register class or issue a COPY to a compatible register
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@ -1,5 +1,5 @@
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; RUN: llc -march=x86 %s -o -
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; RUN: llc -march=x86-64 %s -o -
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; RUN: llc -march=x86 < %s -verify-machineinstrs
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; RUN: llc -march=x86-64 < %s -verify-machineinstrs
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; PR6497
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@ -391,3 +391,38 @@ if.end:
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%t11 = tail call i64 asm sideeffect "foo", "=*m,=A,{bx},{cx},1,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %t6, i32 0, i32 0, i64 0) nounwind
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ret void
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}
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; Avoid emitting wrong kill flags from InstrEmitter.
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; InstrEmitter::EmitSubregNode() may steal virtual registers from already
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; emitted blocks when isCoalescableExtInstr points out the opportunity.
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; Make sure kill flags are cleared on the newly global virtual register.
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define i64 @ov_read(i8* %vf, i8* nocapture %buffer, i32 %length, i32 %bigendianp, i32 %word, i32 %sgned, i32* %bitstream) nounwind uwtable ssp {
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entry:
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br i1 undef, label %return, label %while.body.preheader
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while.body.preheader: ; preds = %entry
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br i1 undef, label %if.then3, label %if.end7
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if.then3: ; preds = %while.body.preheader
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%0 = load i32* undef, align 4
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br i1 undef, label %land.lhs.true.i255, label %if.end7
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land.lhs.true.i255: ; preds = %if.then3
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br i1 undef, label %if.then.i256, label %if.end7
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if.then.i256: ; preds = %land.lhs.true.i255
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%sub.i = sub i32 0, %0
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%conv = sext i32 %sub.i to i64
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br i1 undef, label %if.end7, label %while.end
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if.end7: ; preds = %if.then.i256, %land.lhs.true.i255, %if.then3, %while.body.preheader
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unreachable
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while.end: ; preds = %if.then.i256
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%cmp18 = icmp sgt i32 %sub.i, 0
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%.conv = select i1 %cmp18, i64 -131, i64 %conv
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ret i64 %.conv
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return: ; preds = %entry
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ret i64 -131
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}
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