6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-19 04:32:19 +00:00
Code Issues Projects Releases Wiki Activity

ARM/Thumb2 'cmp rn, #imm' alias to cmn.

Browse Source 
When 'cmp rn #imm' doesn't match due to the immediate not being representable,
but 'cmn rn, #-imm' does match, use the latter in place of the former, as
it's equivalent.

rdar://10552389

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146567 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-12-14 17:30:24 +00:00
parent 404ed3c223
commit 8d11c6349f
4 changed files with 15 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
lib/Target/ARM/ARMInstrInfo.td
View File

@ -5089,6 +5089,11 @@ def : ARMInstAlias<"add${s}${p} $Rd, $Rn, $imm",
(SUBri GPR:$Rd, GPR:$Rn, so_imm_neg:$imm, pred:$p, cc_out:$s)>;
def : ARMInstAlias<"add${s}${p} $Rd, $imm",
(SUBri GPR:$Rd, GPR:$Rd, so_imm_neg:$imm, pred:$p, cc_out:$s)>;
// Same for CMP <--> CMN via t2_so_imm_neg
def : ARMInstAlias<"cmp${p} $Rd, $imm",
(CMNzri rGPR:$Rd, t2_so_imm_neg:$imm, pred:$p)>;
def : ARMInstAlias<"cmn${p} $Rd, $imm",
(CMPri rGPR:$Rd, t2_so_imm_neg:$imm, pred:$p)>;
// The shifter forms of the MOV instruction are aliased to the ASR, LSL,
// LSR, ROR, and RRX instructions.

7
lib/Target/ARM/ARMInstrThumb2.td
View File

@ -4110,13 +4110,18 @@ def : t2InstAlias<"and${s}${p} $Rd, $Rn, $imm",
def : t2InstAlias<"and${s}${p} $Rdn, $imm",
(t2BICri rGPR:$Rdn, rGPR:$Rdn, so_imm_not:$imm,
pred:$p, cc_out:$s)>;
// Likewise, "add Rd, so_imm_neg" -> sub
// Likewise, "add Rd, t2_so_imm_neg" -> sub
def : t2InstAlias<"add${s}${p} $Rd, $Rn, $imm",
(t2SUBri GPRnopc:$Rd, GPRnopc:$Rn, t2_so_imm_neg:$imm,
pred:$p, cc_out:$s)>;
def : t2InstAlias<"add${s}${p} $Rd, $imm",
(t2SUBri GPRnopc:$Rd, GPRnopc:$Rd, t2_so_imm_neg:$imm,
pred:$p, cc_out:$s)>;
// Same for CMP <--> CMN via t2_so_imm_neg
def : t2InstAlias<"cmp${p} $Rd, $imm",
(t2CMNzri rGPR:$Rd, t2_so_imm_neg:$imm, pred:$p)>;
def : t2InstAlias<"cmn${p} $Rd, $imm",
(t2CMPri rGPR:$Rd, t2_so_imm_neg:$imm, pred:$p)>;
// Wide 'mul' encoding can be specified with only two operands.

2
test/MC/ARM/basic-arm-instructions.s
View File

@ -493,6 +493,7 @@ Lforward:
cmp r7, r8, asr r2
cmp r7, r8, ror r2
cmp r1, r6, rrx
cmp r0, #-2
@ CHECK: cmp r1, #15 @ encoding: [0x0f,0x00,0x51,0xe3]
@ CHECK: cmp r1, r6 @ encoding: [0x06,0x00,0x51,0xe1]
@ -506,6 +507,7 @@ Lforward:
@ CHECK: cmp r7, r8, asr r2 @ encoding: [0x58,0x02,0x57,0xe1]
@ CHECK: cmp r7, r8, ror r2 @ encoding: [0x78,0x02,0x57,0xe1]
@ CHECK: cmp r1, r6, rrx @ encoding: [0x66,0x00,0x51,0xe1]
@ CHECK: cmn r0, #2 @ encoding: [0x02,0x00,0x70,0xe3]
@------------------------------------------------------------------------------

3
test/MC/ARM/basic-thumb2-instructions.s
View File

@ -368,6 +368,7 @@ _func:
cmp sp, r6, lsr #1
cmp r2, r5, asr #24
cmp r1, r4, ror #15
cmp r0, #-2
@ CHECK: cmp.w r5, #65280 @ encoding: [0xb5,0xf5,0x7f,0x4f]
@ CHECK: cmp.w r4, r12 @ encoding: [0xb4,0xeb,0x0c,0x0f]
@ -376,7 +377,7 @@ _func:
@ CHECK: cmp.w sp, r6, lsr #1 @ encoding: [0xbd,0xeb,0x56,0x0f]
@ CHECK: cmp.w r2, r5, asr #24 @ encoding: [0xb2,0xeb,0x25,0x6f]
@ CHECK: cmp.w r1, r4, ror #15 @ encoding: [0xb1,0xeb,0xf4,0x3f]
@ CHECK: cmn.w r0, #2 @ encoding: [0x10,0xf1,0x02,0x0f]
@------------------------------------------------------------------------------
@ DBG