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Simplify PHI node elimination significantly by doing it as a prepass to
register allocation git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5066 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -212,6 +212,7 @@ RegAllocSimple::saveVirtRegToStack (MachineBasicBlock &MBB,
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/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
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/// predecessor basic blocks.
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///
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void RegAllocSimple::EliminatePHINodes(MachineBasicBlock &MBB) {
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const MachineInstrInfo &MII = TM.getInstrInfo();
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@ -220,26 +221,12 @@ void RegAllocSimple::EliminatePHINodes(MachineBasicBlock &MBB) {
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// Unlink the PHI node from the basic block... but don't delete the PHI yet
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MBB.erase(MBB.begin());
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DEBUG(std::cerr << "num invalid regs: " << RegsUsed.size() << "\n");
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DEBUG(std::cerr << "num ops: " << MI->getNumOperands() << "\n");
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assert(MI->getOperand(0).isVirtualRegister() &&
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"PHI node doesn't write virt reg?");
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// a preliminary pass that will invalidate any registers that
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// are used by the instruction (including implicit uses)
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invalidatePhysRegs(MI);
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// Allocate a physical reg to hold this temporary.
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//
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unsigned virtualReg = MI->getOperand(0).getAllocatedRegNum();
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unsigned physReg = getFreeReg(virtualReg);
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// Find the register class of the target register: should be the
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// same as the values we're trying to store there
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const TargetRegisterClass* regClass = MF->getRegClass(virtualReg);
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assert(regClass && "Target register class not found!");
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unsigned dataSize = regClass->getDataSize();
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for (int i = MI->getNumOperands() - 1; i >= 2; i-=2) {
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MachineOperand &opVal = MI->getOperand(i-1);
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@ -274,27 +261,20 @@ void RegAllocSimple::EliminatePHINodes(MachineBasicBlock &MBB) {
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// are inserted right in front of it and not in front of a non-branch
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if (!MII.isBranch(opMI->getOpcode()))
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++opI;
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unsigned dataSize = MF->getRegClass(virtualReg)->getDataSize();
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// Retrieve the constant value from this op, move it to target
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// register of the phi
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if (opVal.isImmediate()) {
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opI = RegInfo->moveImm2Reg(opBlock, opI, physReg,
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opI = RegInfo->moveImm2Reg(opBlock, opI, virtualReg,
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(unsigned) opVal.getImmedValue(),
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dataSize);
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} else {
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// Allocate a physical register and add a move in the BB
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unsigned opVirtualReg = opVal.getAllocatedRegNum();
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unsigned opPhysReg;
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opI = moveUseToReg(opBlock, opI, opVirtualReg, physReg);
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opI = RegInfo->moveReg2Reg(opBlock, opI, virtualReg,
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opVal.getAllocatedRegNum(), dataSize);
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}
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// Save that register value to the stack of the TARGET REG
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saveVirtRegToStack(opBlock, opI, virtualReg, physReg);
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}
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// make regs available to other instructions
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clearAllRegs();
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}
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// really delete the PHI instruction now!
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@ -304,9 +284,6 @@ void RegAllocSimple::EliminatePHINodes(MachineBasicBlock &MBB) {
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void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// Handle PHI instructions specially: add moves to each pred block
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EliminatePHINodes(MBB);
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// loop over each instruction
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for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I) {
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// Made to combat the incorrect allocation of r2 = add r1, r1
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@ -366,6 +343,12 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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DEBUG(std::cerr << "Machine Function " << "\n");
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MF = &Fn;
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// First pass: eliminate PHI instructions by inserting copies into predecessor
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// blocks.
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB)
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EliminatePHINodes(*MBB);
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// Loop over all of the basic blocks, eliminating virtual register references
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB)
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