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Rename tBX_Rm to tBX.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132040 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Cameron Zwarich
2011-05-25 04:45:20 +00:00
parent b36c1ae6d5
commit 8f161c3a95
2 changed files with 4 additions and 5 deletions
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4
lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
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@@ -476,8 +476,8 @@ static bool DisassembleThumb1DP(MCInst &MI, unsigned Opcode, uint32_t insn,
// tADDhirr: Rd Rd(TIED_TO) Rm
// tCMPhir: Rd Rm
// tMOVr, tMOVgpr2gpr, tMOVgpr2tgpr, tMOVtgpr2gpr: Rd|tRd Rm|tRn
// tBX: Rm
// tBX_RET: 0 operand
// tBX_RET_vararg: Rm
// tBLXr_r9: Rm
// tBRIND: Rm
static bool DisassembleThumb1Special(MCInst &MI, unsigned Opcode, uint32_t insn,
@@ -488,7 +488,7 @@ static bool DisassembleThumb1Special(MCInst &MI, unsigned Opcode, uint32_t insn,
return true;
// BX/BLX/tBRIND (indirect branch, i.e, mov pc, Rm) has 1 reg operand: Rm.
if (Opcode==ARM::tBLXr_r9 || Opcode==ARM::tBX_Rm || Opcode==ARM::tBRIND) {
if (Opcode==ARM::tBLXr_r9 || Opcode==ARM::tBX || Opcode==ARM::tBRIND) {
if (Opcode != ARM::tBRIND) {
// Handling the two predicate operands before the reg operand.
if (!B->DoPredicateOperands(MI, Opcode, insn, NumOps))