SLPVectorizer: fix wrong scheduling of atomic load/stores.

This fixes PR22306.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227077 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Erik Eckstein 2015-01-26 09:07:04 +00:00
parent 56471c4aec
commit 8f6e8cb4f6
2 changed files with 43 additions and 1 deletions

View File

@ -309,6 +309,17 @@ static AliasAnalysis::Location getLocation(Instruction *I, AliasAnalysis *AA) {
return AliasAnalysis::Location();
}
/// \returns True if the instruction is not a volatile or atomic load/store.
static bool isSimple(Instruction *I) {
if (LoadInst *LI = dyn_cast<LoadInst>(I))
return LI->isSimple();
if (StoreInst *SI = dyn_cast<StoreInst>(I))
return SI->isSimple();
if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(I))
return !MI->isVolatile();
return true;
}
/// Bottom Up SLP Vectorizer.
class BoUpSLP {
public:
@ -501,7 +512,7 @@ private:
}
AliasAnalysis::Location Loc2 = getLocation(Inst2, AA);
bool aliased = true;
if (Loc1.Ptr && Loc2.Ptr) {
if (Loc1.Ptr && Loc2.Ptr && isSimple(Inst1) && isSimple(Inst2)) {
// Do the alias check.
aliased = AA->alias(Loc1, Loc2);
}

View File

@ -0,0 +1,31 @@
; RUN: opt < %s -basicaa -slp-vectorizer -S |FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
@x = global [4 x i32] zeroinitializer, align 16
@a = global [4 x i32] zeroinitializer, align 16
; The SLPVectorizer should not vectorize atomic stores and it should not
; schedule regular stores around atomic stores.
; CHECK-LABEL: test
; CHECK: store i32
; CHECK: store atomic i32
; CHECK: store i32
; CHECK: store atomic i32
; CHECK: store i32
; CHECK: store atomic i32
; CHECK: store i32
; CHECK: store atomic i32
define void @test() {
entry:
store i32 0, i32* getelementptr inbounds ([4 x i32]* @a, i64 0, i64 0), align 16
store atomic i32 0, i32* getelementptr inbounds ([4 x i32]* @x, i64 0, i64 0) release, align 16
store i32 0, i32* getelementptr inbounds ([4 x i32]* @a, i64 0, i64 1), align 4
store atomic i32 1, i32* getelementptr inbounds ([4 x i32]* @x, i64 0, i64 1) release, align 4
store i32 0, i32* getelementptr inbounds ([4 x i32]* @a, i64 0, i64 2), align 8
store atomic i32 2, i32* getelementptr inbounds ([4 x i32]* @x, i64 0, i64 2) release, align 8
store i32 0, i32* getelementptr inbounds ([4 x i32]* @a, i64 0, i64 3), align 4
store atomic i32 3, i32* getelementptr inbounds ([4 x i32]* @x, i64 0, i64 3) release, align 4
ret void
}