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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
Remove extra semi-colons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151169 91177308-0d34-0410-b5e6-96231b3b80d8
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91ba63d230
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@ -650,7 +650,7 @@ void RegionInfo::buildRegionsTree(DomTreeNode *N, Region *region) {
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// This basic block is a start block of a region. It is already in the
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// BBtoRegion relation. Only the child basic blocks have to be updated.
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if (it != BBtoRegion.end()) {
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Region *newRegion = it->second;;
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Region *newRegion = it->second;
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region->addSubRegion(getTopMostParent(newRegion));
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region = newRegion;
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} else {
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@ -1111,7 +1111,7 @@ ReoptimizeBlock:
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}
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}
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PrevBB.splice(PrevBB.end(), MBB, MBB->begin(), MBB->end());
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PrevBB.removeSuccessor(PrevBB.succ_begin());;
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PrevBB.removeSuccessor(PrevBB.succ_begin());
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assert(PrevBB.succ_empty());
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PrevBB.transferSuccessors(MBB);
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MadeChange = true;
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@ -1670,7 +1670,7 @@ bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) {
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LocalDefsSet.insert(*OR);
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}
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HasDups = true;;
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HasDups = true;
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++TIB;
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++FIB;
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}
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@ -75,7 +75,7 @@ uint32_t DataExtractor::getU32(uint32_t *offset_ptr) const {
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uint32_t *DataExtractor::getU32(uint32_t *offset_ptr, uint32_t *dst,
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uint32_t count) const {
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return getUs<uint32_t>(offset_ptr, dst, count, this, IsLittleEndian,
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Data.data());;
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Data.data());
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}
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uint64_t DataExtractor::getU64(uint32_t *offset_ptr) const {
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@ -779,7 +779,7 @@ int64_t ARMBaseRegisterInfo::
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getFrameIndexInstrOffset(const MachineInstr *MI, int Idx) const {
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const MCInstrDesc &Desc = MI->getDesc();
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unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
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int64_t InstrOffs = 0;;
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int64_t InstrOffs = 0;
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int Scale = 1;
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unsigned ImmIdx = 0;
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switch (AddrMode) {
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@ -644,7 +644,7 @@ SDValue MSP430TargetLowering::LowerExternalSymbol(SDValue Op,
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const char *Sym = cast<ExternalSymbolSDNode>(Op)->getSymbol();
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SDValue Result = DAG.getTargetExternalSymbol(Sym, getPointerTy());
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return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result);;
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return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result);
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}
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SDValue MSP430TargetLowering::LowerBlockAddress(SDValue Op,
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@ -653,7 +653,7 @@ SDValue MSP430TargetLowering::LowerBlockAddress(SDValue Op,
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const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
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SDValue Result = DAG.getBlockAddress(BA, getPointerTy(), /*isTarget=*/true);
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return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result);;
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return DAG.getNode(MSP430ISD::Wrapper, dl, getPointerTy(), Result);
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}
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static SDValue EmitCMP(SDValue &LHS, SDValue &RHS, SDValue &TargetCC,
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@ -302,7 +302,7 @@ void X86Subtarget::AutoDetectSubtargetFeatures() {
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}
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// FIXME: AVX2 codegen support is not ready.
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//if ((EBX >> 5) & 0x1) {
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// X86SSELevel = AVX2;;
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// X86SSELevel = AVX2;
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// ToggleFeature(X86::FeatureAVX2);
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//}
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if ((EBX >> 8) & 0x1) {
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@ -107,7 +107,7 @@ bool GCOVFunction::read(GCOVBuffer &Buff, GCOVFormat Format) {
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for (unsigned i = 0, e = Count; i != e; ++i) {
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Blocks[i]->addCount(Buff.readInt64());
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}
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return true;;
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return true;
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}
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LineNumber = Buff.readInt();
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