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[mips] Expose adjustStackPtr() from MipsInstrInfo. NFC.

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Summary:
adjustStackPtr() is implemented from both MipsSEInstrInfo and
Mips16InstrInfo. It makes sense to expose this function from
MipsInstrInfo and avoid explicit casting in some cases.

Depends on D8638.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8640

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233905 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vasileios Kalintiris 2015-04-02 10:42:44 +00:00
parent cb64898a22
commit 91a9b15130
5 changed files with 8 additions and 10 deletions
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5
lib/Target/Mips/Mips16FrameLowering.cpp
View File

@ -153,10 +153,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
Amount = -Amount;
const Mips16InstrInfo &TII =
*static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
TII.adjustStackPtr(Mips::SP, Amount, MBB, I);
STI.getInstrInfo()->adjustStackPtr(Mips::SP, Amount, MBB, I);
}
MBB.erase(I);

2
lib/Target/Mips/Mips16InstrInfo.h
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@ -77,7 +77,7 @@ public:
/// Adjust SP by Amount bytes.
void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;
MachineBasicBlock::iterator I) const override;
/// Emit a series of instructions to load an immediate.
// This is to adjust some FrameReg. We return the new register to be used

4
lib/Target/Mips/MipsInstrInfo.h
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@ -117,6 +117,10 @@ public:
const TargetRegisterInfo *TRI,
int64_t Offset) const = 0;
virtual void adjustStackPtr(unsigned SP, int64_t Amount,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const = 0;
/// Create an instruction which has the same operands and memory operands
/// as MI but has a new opcode.
MachineInstrBuilder genInstrWithNewOpc(unsigned NewOpc,

5
lib/Target/Mips/MipsSEFrameLowering.cpp
View File

@ -611,9 +611,6 @@ MipsSEFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
void MipsSEFrameLowering::
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const {
const MipsSEInstrInfo &TII =
*static_cast<const MipsSEInstrInfo *>(STI.getInstrInfo());
if (!hasReservedCallFrame(MF)) {
int64_t Amount = I->getOperand(0).getImm();
@ -621,7 +618,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
Amount = -Amount;
unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP;
TII.adjustStackPtr(SP, Amount, MBB, I);
STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I);
}
MBB.erase(I);

2
lib/Target/Mips/MipsSEInstrInfo.h
View File

@ -68,7 +68,7 @@ public:
/// Adjust SP by Amount bytes.
void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;
MachineBasicBlock::iterator I) const override;
/// Emit a series of instructions to load an immediate. If NewImm is a
/// non-NULL parameter, the last instruction is not emitted, but instead